Methods and apparatus for detecting defects in interconnect structures

• US 7,901,953 B2
• Filed: 09/06/2008
• Issued: 03/08/2011
• Est. Priority Date: 09/06/2007
• Status: Expired due to Fees

• Current Assignee: Applied Materials Incorporated
• Original Assignee: Applied Materials Incorporated
• Inventors: Smayling, Karl F., Oemardani, Shiany, Smayling, Michael C.
• Primary Examiner(s): Lindsay, Jr.; Walter L
• Assistant Examiner(s): STEVENSON, ANDRE C
• Application Number:
  US12/205,871
• Publication Number:
  US 20090066358A1
• Time in Patent Office: 913 Days
• Field of Search: None
• US Class Current: 438/14
• CPC Class Codes: G01R 31/2853 Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections G01R31/31717 takes precedence; test of chip-to-PCB or lead-to-PCB connections G01R31/66
• CPC Class Codes: G01R 31/2858 Measuring of material aspects, e.g. electro-migration [EM], hot carrier injection
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

In some aspects, a method is provided for detecting a void in a test structure that comprises (a) measuring a resistance of the test structure; (b) applying a stress to the test structure at increasing levels until at least one of: (i) the measured resistance of the test structure exceeds a predetermined resistance threshold; and (ii) the stress level reaches a predetermined stress maximum; (c) detecting a void if the measured resistance of the test structure exceeds the predetermined resistance threshold; and (d) determining that the test structure is void free if the stress level reaches the predetermined stress maximum without the measured resistance of the test structure exceeding the predetermined resistance threshold. Numerous other aspects are provided.

Claims

1. A method of detecting a void in a test structure comprising:

a) measuring a resistance of the test structure;

b) applying a stress to the test structure at increasing levels until at least one of;

i) the measured resistance of the test structure exceeds a predetermined resistance threshold; and

ii) the stress level reaches a predetermined stress maximum;

c) detecting a void if the measured resistance of the test structure exceeds the predetermined resistance threshold; and

d) determining that the test structure is void free if the stress level reaches the predetermined stress maximum without the measured resistance of the test structure exceeding the predetermined resistance threshold.

2. The method of claim 1, wherein a measurement of the resistance of the test structure is performed after each increase in the stress level.

3. The method of claim 1, wherein the test structure comprises a chain structure or a serpentine structure.

4. The method of claim 1 wherein the stress level comprises a current level.

5. The method of claim 1 wherein each stress level is applied to the test structure for a predetermined time period.

6. The method of claim 1 wherein the void is formed in a barrier layer of the test structure.

7. The method of claim 1 wherein the void is formed in a metal layer of the test structure.

8. A system for detecting a void in a test structure comprising:

a measurement device adapted to measure a resistance of the test structure;

a stressing mechanism adapted to apply a stress to the test structure at increasing levels; and

a control unit coupled to the measurement device and the stressing mechanism, the control unit adapted to;

i) determine at least one of whether the measured resistance of the test structure exceeds a predetermined resistance threshold and the stress level has reached a predetermined stress maximum;

ii) detect the presence of a void if the measured resistance of the test structure exceeds the predetermined resistance threshold; and

iii) determine that the test structure is void-free if the stress level applied to the test structure reaches the predetermined stress maximum without the measured resistance of the test structure exceeding the predetermined resistance threshold.

9. The system of claim 8, wherein the control unit is adapted to cause the measurement device to perform a measurement of the resistance of the test structure after each increase in the stress level.

10. The system of claim 8 wherein the test structure comprises a chain structure or a serpentine structure.

11. The system of claim 8 wherein the stress level comprises a current level.

12. The system of claim 8 wherein the stressing mechanism is adapted to apply each stress level to the test structure for a predetermined time period.

13. The system of claim 8 wherein the void is formed in a barrier layer of the test structure.

14. The system of claim 8 wherein the void is formed in a metal layer of the test structure.