Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
First Claim
1. A microelectronic device, comprising:
- a semiconductor substrate including integrated circuitry and terminals electrically coupled to the integrated circuitry;
electrically conductive interconnects extending through at least a portion of the semiconductor substrate and electrically coupled to corresponding terminals; and
a conductive backplane assembly comprisinga conductive layer at a back side of the semiconductor substrate, wherein the conductive layer includes an array of openings aligned with corresponding interconnects such that back side post portions of the interconnects extend through at least a portion of the respective openings in the conductive layer; and
dielectric spacers in the openings between the conductive layer and the back side post portions of the corresponding interconnects, wherein at least one interconnect is electrically coupled to the conductive layer, and wherein at least one other interconnect is electrically isolated from the conductive layer.
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Accused Products
Abstract
Microfeature workpieces having interconnects and conductive backplanes and associated systems and methods are disclosed herein. One such device includes a semiconductor substrate having integrated circuitry and terminals electrically coupled to the integrated circuitry. The device also includes electrically conductive interconnects extending through at least a portion of the semiconductor substrate and electrically coupled to corresponding terminals. The device further includes a conductive backplane assembly having a conductive layer at a back side of the semiconductor substrate. One or more of the interconnects are electrically coupled to the conductive layer at the back side of the semiconductor substrate.
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Citations
22 Claims
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1. A microelectronic device, comprising:
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a semiconductor substrate including integrated circuitry and terminals electrically coupled to the integrated circuitry; electrically conductive interconnects extending through at least a portion of the semiconductor substrate and electrically coupled to corresponding terminals; and a conductive backplane assembly comprising a conductive layer at a back side of the semiconductor substrate, wherein the conductive layer includes an array of openings aligned with corresponding interconnects such that back side post portions of the interconnects extend through at least a portion of the respective openings in the conductive layer; and dielectric spacers in the openings between the conductive layer and the back side post portions of the corresponding interconnects, wherein at least one interconnect is electrically coupled to the conductive layer, and wherein at least one other interconnect is electrically isolated from the conductive layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A microelectronic device, comprising:
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a semiconductor substrate including a front side, a back side opposite the front side, integrated circuitry, and an array of bond-pads at the front side electrically coupled to the integrated circuitry; a plurality of electrically conductive interconnects extending through the substrate, the interconnects having first portions electrically coupled with corresponding bond-pads and second portions at the back side; a metal layer at the back side of the semiconductor substrate having an array of openings aligned with corresponding interconnects, wherein the second portion of at least one of the interconnects is received in a corresponding opening; a dielectric layer over the metal layer, the dielectric layer having openings aligned with the interconnects; and a plurality of solder balls attached to corresponding interconnects at the back side of the semiconductor substrate, wherein at least one of the solder balls is configured to electrically couple the integrated circuitry to the metal layer within the footprint of the semiconductor substrate and at least one solder ball is electrically isolated from the metal layer. - View Dependent Claims (10, 11, 12)
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13. A microelectronic device, comprising:
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a semiconductor substrate including integrated circuitry and bond-pads electrically coupled to the integrated circuitry; electrically conductive through-substrate interconnects in contact with corresponding bond-pads and having back side portions; and an EMI shield at a back side of the semiconductor substrate for EMI shielding, the EMI shield comprising a conductive layer having apertures aligned with corresponding interconnects, wherein the back side portions of the interconnects extend through at least a portion of the corresponding apertures; a dielectric layer over the metal layer, the dielectric layer having openings aligned with the interconnects; and a plurality of conductive couplers attached to corresponding interconnects at the back side of the semiconductor substrate, wherein the back side portion of at least one interconnect is electrically coupled to the EMI shield with one of the conductive couplers, and wherein the back side portion of at least one other interconnect and corresponding conductive coupler is electrically isolated from the EMI shield. - View Dependent Claims (14)
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15. A microelectronic assembly, comprising:
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a first microelectronic device having a first microelectronic die with a first integrated circuit and an array of first bond-pads electrically coupled to the first integrated circuit; first electrically conductive interconnects extending at least partially through the first die and in contact with corresponding first bond-pads; and a first conductive backplane assembly comprising a first conductive layer at a back side of the first die, wherein the first conductive layer includes an array of first openings aligned with corresponding first interconnects such that back side post portions of the first interconnects are accessible through the first openings in the first conductive layer; and first dielectric spacers in the first openings between the first conductive layer and the back side post portions of the corresponding first interconnects, wherein at least one first interconnect is electrically coupled to the first conductive layer and at least one other first interconnect is electrically isolated from the first conductive layer; and a second microelectronic device coupled to the first microelectronic device in a stacked configuration, the second microelectronic device having a second microelectronic die with a second integrated circuit and an array of second bond-pads electrically coupled to the second integrated circuit; second electrically conductive interconnects extending at least partially through the second die and in contact with corresponding second bond-pads; and a second conductive backplane assembly comprising a second conductive layer at a back side of the second die, wherein the second conductive layer includes an array of second openings aligned with corresponding second interconnects such that back side post portions of the second interconnects are accessible through the firs second t openings in the second conductive layer; and second dielectric spacers in the second openings between the second conductive layer and the back side post portions of the corresponding second interconnects, wherein at least one second interconnect is electrically coupled to the second conductive layer and at least one other second interconnect is electrically isolated from the second conductive layer. - View Dependent Claims (16, 17, 18, 19)
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20. A microelectronic device, comprising:
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a semiconductor substrate including a front side, a back side opposite the front side, integrated circuitry, and an array of bond-pads at the front side of the substrate electrically coupled to the integrated circuitry; a plurality of electrically conductive interconnects extending through the substrate, the interconnects having front side portions electrically coupled with corresponding bond-pads, and back side post portions at the back side of the substrate; a conductive layer at the back side of the substrate having an array of openings aligned with corresponding interconnects such that the back side post portions of the interconnects extend through the openings in the conductive layer; and dielectric spacers in the openings between the conductive layer and the back side post portions of the corresponding interconnects, wherein the back side post portions of first interconnects are electrically coupled to the conductive layer, and the back side post portions of second interconnects are electrically isolated from the conductive layer. - View Dependent Claims (21)
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22. A microfeature workpiece including a semiconductor substrate having a front side and a back side, the workpiece comprising:
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a plurality of microelectronic dies on and/or in the semiconductor substrate, the individual dies including integrated circuitry, an array of bond-pads electrically coupled to the integrated circuitry, a plurality of electrically conductive through-substrate interconnects electrically coupled to corresponding bond-pads, a back side metal layer having an array of openings aligned with corresponding interconnects such that back side post portions of the interconnects extend through at least a portion of the respective openings, and dielectric spacers in the openings between the back side metal layer and the back side post portions of the corresponding interconnects, wherein at least one of the interconnects is electrically coupled to the metal layer, and wherein at least one other interconnect is electrically isolated from the metal layer; and a plurality of scribe lines spacing apart the individual dies.
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Specification