Switched capacitor resonator and sigma-delta modulator using the same

• US 7,902,916 B2
• Filed: 10/20/2008
• Issued: 03/08/2011
• Est. Priority Date: 12/11/2007
• Status: Expired due to Fees

• Current Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Original Assignee: Samsung Electro-Mechanics Co., Ltd. (Samsung Group)
• Inventors: Jeong, Chan Yong
• Primary Examiner(s): Donovan; Lincoln
• Assistant Examiner(s): ROJAS, DANIEL E
• Application Number:
  US12/254,429
• Publication Number:
  US 20090146735A1
• Time in Patent Office: 869 Days
• Field of Search: 327/554
• US Class Current: 327/554
• CPC Class Codes: H03F 3/005 using switched capacitors, e.g. dynamic amplifiers; using switched capacitors as resistors in differential amplifiers H03F3/45 takes precedence
• CPC Class Codes: H03H 19/004 Switched capacitor networks
• CPC Class Codes: H03K 3/0322 with differential cells
• CPC Class Codes: H03K 5/249 using clock signals
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation
• CPC Class Codes: H03M 3/406 by the use of a pair of integrators forming a closed loop

Abstract

Provided is a switched capacitor resonator including at least one integrator circuit having a differential operational amplifier and a sub feedback circuit configured with a switched capacitor circuit. A main feedback circuit connecting main input and output terminals of the switched capacitor resonator to each other may be configured with the switched capacitor circuit. The main feedback circuit may be connected to the sub feedback circuit included in one of the integrator circuits. A capacitor of the main feedback circuit can serve as an integration capacitor connected between the input and output terminals of the differential operational amplifier. Consequently, it is possible to improve an operating speed by reducing a settling time constant of the integrator circuit.

Claims

1. A switched capacitor resonator, comprising:

a main input terminal configured to receive an analog differential signal, and a main output terminal configured to output an analog differential signal;

a first signal input circuit connected to the main input terminal, and having a switched capacitor circuit configuration configured with a capacitor and two kinds of switches configured to be opened/shorted by switching clocks having a phase different of 180°

therebetween;

a first integrator circuit comprising a first differential operational amplifier having an input terminal connected to the first signal input circuit, and a first sub feedback circuit having the switched capacitor circuit configuration, the first sub feedback circuit being connected between input and output terminals of the first differential operational amplifier;

a second signal input circuit connected to the output terminal of the first differential operational amplifier, and having the switched capacitor circuit configuration;

a second integrator circuit comprising a second differential operational amplifier having an input terminal connected to the second signal input circuit and an output terminal connected to the main output terminal, and a second sub feedback circuit having the switched capacitor circuit configuration, the second sub feedback circuit being connected between input and output terminals of the second differential operational amplifier; and

a main feedback circuit connected between the first signal input circuit and the main output terminal, and having the switched capacitor circuit configuration,

wherein the main feedback circuit has a capacitor including a first end and a second end; and

wherein the first end is directly connected to the first signal input circuit and directly connected to the input terminal of the second differential operational amplifier through the switches, and the second end is directly connected to the main output terminal through the switches, whereby the capacitor of the main feedback circuit serves as an integration capacitor connected between the input and output terminals of the second differential operational amplifier according to whether the switches are shorted or opened.

2. The switched capacitor resonator of claim 1, wherein the main input terminal comprises first and second main input terminals through which two signals comprising the analog differential signal are input, respectively,

the first signal input circuit comprising:

a first switched capacitor circuit comprising a first switch having one end connected to the first main input terminal, a first capacitor having an one end connected to the other end of the first switch, a second switch having one end connected to the other end of the first capacitor and the other end connected to an inverting input terminal of the first differential operational amplifier, a third switch connected between a ground and a connection node between the first capacitor and the second switch, and a fourth switch connected between the ground and a connection node between the first switch and the first capacitor; and

a second switched capacitor circuit comprising a fifth switch having one end connected to the second main input terminal, a second capacitor having an one end connected to the other end of the fifth switch, a sixth switch having one end connected to the other end of the second capacitor and the other end connected to a non-inverting input terminal of the first differential operational amplifier, a seventh switch connected between the ground and a connection node between the second capacitor and the sixth switch, and an eighth switch connected between the ground and a connection node between the fifth switch and the second capacitor,

wherein the first, third, fifth, and seventh switches are shorted/opened by a first switching clock, and the second, fourth, sixth and eighth switches are shorted/opened by a second switching clock having a phase difference of 180°

from the first switching clock.

3. The switched capacitor resonator of claim 2, wherein the first sub feedback circuit comprises:

a third switched capacitor circuit comprising a ninth switch having one end connected to the inverting input terminal of the first differential operational amplifier, a third capacitor having one end connected to the other end of the ninth switch, a tenth switch having one end connected to the other end of the third capacitor and the other end connected to a non-inverting output terminal of the first differential amplifier, an eleventh switch connected between the ground and a connection node between the third capacitor and the ninth switch, a twelfth switch connected between the ground and a connection node between the third capacitor and the tenth switch, a fourth capacitor having one end connected to the inverting input terminal of the first differential operational amplifier, a thirteenth switch connected between the other end of the fourth capacitor and the non-inverting output terminal of the first differential operational amplifier, and a fourteenth switch connected between the ground and a connection node between the fourth capacitor and the thirteenth switch; and

a fourth switched capacitor circuit comprising a fifteenth switch having one end connected to the non-inverting input terminal of the first differential operational amplifier, a fifth capacitor having one end connected to the other end of the fifteenth switch, a sixteenth switch having one end connected to the other end of the fifth capacitor and the other end connected to an inverting output terminal of the first differential amplifier, a seventeenth switch connected between the ground and a connection node between the fifteenth switch and the fifth capacitor, an eighteenth switch connected between the ground and a connection node between the fifth capacitor and the sixteenth switch, a sixth capacitor having one end connected to the non-inverting input terminal of the first differential operational amplifier, a nineteenth switch connected between the other end of the sixth capacitor and the inverting output terminal of the first differential operational amplifier, and a twentieth switch connected between the ground and a connection node between the sixth capacitor and the nineteenth switch,

wherein the ninth, tenth, fourteenth, fifteenth, sixteenth and twentieth switches are shorted/opened by the first switching clock, and the eleventh, twelfth, thirteenth, seventeenth, eighteenth and nineteenth switches are shorted/opened by the second switching clock.

4. The switched capacitor resonator of claim 3, wherein the second signal input circuit comprises:

a fifth switched capacitor circuit comprising a twenty-first switch having one end connected to the non-inverting output terminal of the first differential operational amplifier, a seventh capacitor having one end connected to the other end of the twenty-first switch, a twenty-second switch having one end connected to the other end of the seventh capacitor and the other end connected to an inverting input terminal of the second differential amplifier, a twenty-third switch connected between the ground and a connection node between the seventh capacitor and the twenty-second switch, and a twenty-fourth switch connected between the ground and a connection node between the seventh capacitor and the twenty-first switch; and

a sixth switched capacitor circuit comprising a twenty-fifth switch having one end connected to the inverting output terminal of the first differential operational amplifier, an eighth capacitor having one end connected to the other end of the twenty-fifth switch, a twenty-sixth switch having one end connected to the other end of the eighth capacitor and the other end connected to a non-inverting input terminal of the second differential amplifier, a twenty-seventh switch connected between the ground and a connection node between the eighth capacitor and the twenty-sixth switch, and a twenty-eighth switch connected between the ground and a connection node between the eighth capacitor and the twenty-fifth switch,

wherein the twenty-first, twenty-third, twenty-fifth and twenty-seventh switches are shorted/opened by the first switching clock, and the twenty-second, twenty-fourth, twenty-sixth and twenty-eighth switches are shorted/opened by the second switching clock.

5. The switched capacitor resonator of claim 4, wherein the second sub feedback circuit comprises:

a seventh switched capacitor circuit comprising a twenty ninth switch having one end connected to the inverting input terminal of the second differential operational amplifier, a ninth capacitor having one end connected to the other end of the twenty ninth switch, a thirtieth switch having one end connected to the other end of the ninth capacitor and the other end connected to a non-inverting output terminal of the second differential amplifier, a thirty-first switch connected between the ground and a connection node between the ninth capacitor and the thirtieth switch, a tenth capacitor having one end connected to the inverting input terminal of the second differential operational amplifier, a thirty-second switch connected between the other end of the tenth capacitor and the non-inverting output terminal of the second differential operational amplifier, and a thirty-third switch connected between the ground and a connection node between the tenth capacitor and the thirty-second switch; and

an eighth switched capacitor circuit comprising a thirty-fourth switch having one end connected to the non-inverting input terminal of the second differential operational amplifier, an eleventh capacitor having one end connected to the other end of the thirty-fourth switch, a thirty-fifth switch having one end connected to the other end of the eleventh capacitor and the other end connected to an inverting output terminal of the second differential amplifier, a thirty-sixth switch connected between the ground and a connection node between the thirty-fifth switch and the eleventh capacitor, a twelfth capacitor having one end connected to the non-inverting input terminal of the second differential operational amplifier, a thirty-seventh switch connected between the other end of the twelfth capacitor and the inverting output terminal of the second differential operational amplifier, and a thirty-eighth switch connected between the ground and a connection node between the twelfth capacitor and the thirty-seventh switch,

wherein the twenty ninth, thirtieth, thirty-third, thirty-fourth, thirty-fifth and thirty-eighth switches are shorted/opened by the first switching clock, and the thirty-first, thirty-second, thirty-sixth and thirty-seventh switches are shorted/opened by the second switching clock.

6. The switched capacitor resonator of claim 5, wherein the main feedback circuit comprises:

a ninth switched capacitor comprising a thirty-ninth switch having one end connected to a connection node between the first capacitor and the second switch, a thirteenth capacitor having one end connected to the other end of the thirty-ninth switch, a fortieth switch connected between the other end of the thirteenth capacitor and the ground, and a forty-first switch connected between the inverting output terminal of the second differential operational amplifier and a connection node between the thirteenth capacitor and the fortieth switch, a connection node between the thirty-ninth switch and the thirteenth capacitor being connected to a connection node between the eleventh capacitor and the thirty-fourth switch; and

a tenth switched capacitor comprising a forty-second switch having one end connected to a connection node between the second capacitor and the sixth switch, a fourteenth capacitor having one end connected to the other end of the forty-second switch, a forty-third switch connected between the other end of the fourteenth capacitor and the ground, and a forty-fourth switch connected between the non-inverting output terminal of the second differential operational amplifier and a connection node between the fourteenth capacitor and the forty-third switch, a connection node between the forty-second switch and the fourteenth capacitor being connected to a connection node between the ninth capacitor and the twenty ninth switch,

wherein the forty-first and forty-fourth switches are shorted/opened by the first switching clock, and the thirty-ninth, fortieth, forty-second and forty-third switches are shorted/opened by the second switching clock.

7. The switched capacitor resonator of claim 6, wherein the first to ninth, eleventh, thirteenth and fourteenth capacitors have the same capacitance, and the tenth and twelfth capacitors have twice the capacitance of the first capacitor.

8. A sigma-delta modulator comprising at least one switched capacitor resonator of claim 1.