Determining locations on a wafer to be reviewed during defect review
First Claim
1. A computer-implemented method for determining locations on a wafer to be reviewed during defect review, comprising:
- acquiring coordinates of defects detected by two or more inspection systems, wherein the defects do not comprise defects detected on the wafer;
determining coordinates of the locations on the wafer to be reviewed during the defect review by translating the coordinates of the defects into the coordinates on the wafer such that results of the defect review performed at the locations can be used to determine if the defects cause systematic defects on the wafer; and
using information reference to the defects detected by the two or more inspection systems and results of the defect review to generate a design for a test structure configured to be monitored for systematic defects and to add the design to a design to be printed on product wafers.
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Abstract
Various methods, designs, defect review tools, and systems for determining locations on a wafer to be reviewed during defect review are provided. One computer-implemented method includes acquiring coordinates of defects detected by two or more inspection systems. The defects do not include defects detected on the wafer. The method also includes determining coordinates of the locations on the wafer to be reviewed during the defect review by translating the coordinates of the defects into the coordinates on the wafer such that results of the defect review performed at the locations can be used to determine if the defects cause systematic defects on the wafer.
71 Citations
24 Claims
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1. A computer-implemented method for determining locations on a wafer to be reviewed during defect review, comprising:
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acquiring coordinates of defects detected by two or more inspection systems, wherein the defects do not comprise defects detected on the wafer; determining coordinates of the locations on the wafer to be reviewed during the defect review by translating the coordinates of the defects into the coordinates on the wafer such that results of the defect review performed at the locations can be used to determine if the defects cause systematic defects on the wafer; and using information reference to the defects detected by the two or more inspection systems and results of the defect review to generate a design for a test structure configured to be monitored for systematic defects and to add the design to a design to be printed on product wafers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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23. A computer-readable storage medium, comprising program instructions executable on a computer system for performing a computer-implemented method for determining locations on a wafer to be reviewed during defect review, wherein the computer-implemented method comprises:
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acquiring coordinates of defects detected by two or more inspection systems, wherein the defects do not comprise defects detected on the wafer; determining coordinates of the locations on the wafer to be reviewed during the defect review by translating the coordinates of the defects into the coordinates on the wafer such that results of the defect review performed at the locations can be used to determine if the defects cause systematic defects on the wafer; and using information reference to the defects detected by the two or more inspection systems and results of the defect review to generate a design for a test structure configured to be monitored for systematic defects and to add the design to a design to be printed on product wafers.
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24. A system configured to determine locations on a wafer to be reviewed during defect review, comprising:
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two or more inspection systems configured to detect defects, wherein the defects do not comprise defects detected on the wafer; and a computer system coupled to the two or more inspection systems such that the computer system can acquire coordinates of the defects detected by the two or more inspection systems, wherein the computer system is configured to determine coordinates of the locations on the wafer to be reviewed during the defect review by translating the coordinates of the defects into the coordinates on the wafer such that results of the defect review performed at the locations can be used to determine if the defects cause systematic defects on the wafer, and wherein the computer system is further configured to use information reference to the defects detected by the two or more inspection systems and results of the defect review to generate a design for a test structure configured to be monitored for systematic defects and to add the design to a design to be printed on product wafers.
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Specification