CMOS circuit leakage current calculator

• US 7,904,847 B2
• Filed: 02/18/2008
• Issued: 03/08/2011
• Est. Priority Date: 02/18/2008
• Status: Active Grant

• Current Assignee: Siemens Industry Software Inc. (Siemens AG)
• Original Assignee: International Business Machines Corporation
• Inventors: Rohatgi, Nishith, Correale, Anthony Jr., Bowers, Benjamin John
• Primary Examiner(s): ROSSOSHEK, YELENA
• Application Number:
  US12/032,745
• Publication Number:
  US 20090210831A1
• Time in Patent Office: 1,114 Days
• Field of Search: 716/1, 716/2, 716/4, 716/8, 716/16, 716/17, 257/349, 257/547, 326 31- 36, 327/199, 327/200, 327/210, 327/333
• US Class Current: 716/51
• CPC Class Codes: G06F 2119/06 Power analysis or power optimisation
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

This invention provides a method for determining leakage current in a CMOS circuit having several devices. It includes the steps of reading a netlist which describes the circuit and includes information on both these devices in the circuit and how these devices are interconnected. Next, an input signal state data file is generated which provides all of the possible input states for the circuit. A determination is made of which devices in the circuit are in an OFF state for each of the input signal states provided. Then the leakage current for each of these devices in the OFF state is computed for each of the input signal states.

Claims

1. A method performed in a data processing system for determining leakage current in a CMOS circuit having a plurality of devices comprising the steps of:

reading netlist data from a data processing system memory containing information on each of the plurality of devices and their respective connections within the circuit;

reading a plurality of input state data from said data processing system memory, each input state specifying input signals provided to the circuit;

determining which devices in the circuit are in an OFF state for each of the plurality of input states;

computing leakage current for only those devices that are in the OFF state and do not have the same source and drain voltage; and

providing to a data processing system display resulting leakage information for each input state.

2. The method according to claim 1 wherein said netlist information includes for each device, device type, device characteristics including at least threshold voltage type.

3. The method according to claim 1 wherein the reading the input state data step includes the step of reading weighted input information.

4. The method according to claim 1 wherein said determining step includes a further a step of initially setting each voltage supply connection of the circuit to its assigned voltage supply value from the netlist, each ground connection to its assigned ground potential value from the netlist and all other nodes not directly connect to the input signals to a logic neutral value.

5. The method according to claim 4 further including a step of simulating circuit operation by traversing the circuit devices according to their position in the circuit with each input signal data to determine which devices in the circuit are ON or OFF.

6. The method according to claim 5 wherein said simulating step further includes the step of determining the voltages at each node in the circuit.

7. The method according to claim 6 wherein said simulating step further includes the step of propagating the source logic value to the drain logic value for those devices that are in an ON state.

8. The method according to claim 1 wherein the reading input state data step furthers includes a step of generation input state data if no input state data is provided.

9. The method according to claim 1 wherein said providing resulting leakage information step included providing leakage information for each device.

10. A method performed in a data processing system for determining leakage current in a CMOS circuit having a plurality of devices comprising the steps of:

reading netlist data from a data processing system memory containing information on each of the plurality of devices and their respective connections within the circuit;

reading a plurality of input state data from said data processing system memory, each input state specifying input signals provided to the circuit;

reading input state weight data specifying occurrence information for individual input signal data;

determining which devices in the circuit are in an OFF state for each of the plurality of input states;

computing leakage current for each device in the OFF state according to the device position in the circuit for each of the plurality of input states and the input state weight data; and

providing to a data processing system display resulting leakage information for each input state.

11. A method performed in a data processing system for determining leakage current in a CMOS circuit having a plurality of devices comprising the steps of:

reading netlist data from a data processing system memory containing information on each of the plurality of devices and their respective connections within the circuit;

reading a plurality of input state data from said data processing system memory, each input state specifying input signals provided to the circuit;

determining which devices in the circuit are in an OFF state for each of the plurality of input states;

computing leakage current for each device in the OFF state according to the device position in the circuit for each of the plurality of input states and by combining any two devices that have the same source and drain connections if the devices are either both ON or OFF and replacing the two devices with a single device having a sum of their channel widths; and

providing to a data processing system display resulting leakage information for each input state.

12. A computer program product stored in a computer operable non-transitory media, the computer operable non-transitory media containing instructions for execution by a computer, which, when executed by the computer, cause the computer to implement a method for determining leakage current in a CMOS circuit having a plurality of devices, the method comprising the steps of:

reading netlist data containing information on each of the plurality of devices and their respective connections within the circuit;

reading a plurality of input state data, each input state specifying input signals provided to the circuit;

determining which devices in the circuit are in an OFF state for each of the plurality of input stat;

computing leakage current for only each device in the OFF state according to the device position in the circuit for each of the plurality of input states and that do not have the same source and drain; and

providing resulting leakage information for each input state.

13. The computer program according to claim 12 wherein said netlist information includes for each device, device type, device characteristics including at least threshold voltage type.

14. The computer program according to claim 12 wherein said determining step includes a further a step of initially setting each voltage supply connection of the circuit to its assigned voltage supply value from the netlist, each ground connection to its assigned ground potential value from the netlist and all other nodes not directly connect to the input signals to a logic neutral value.

15. The computer program according to claim 14 further including a step of simulating circuit operation by traversing the circuit devices according to their position in the circuit with each input signal data to determine which devices in the circuit are ON or OFF.

16. The computer program according to claim 12 wherein the reading input state data step furthers includes a step of generation input state data if no input state data is provided.

17. A computer program product stored in a computer operable non-transitory media, the computer operable non-transitory media containing instructions for execution by a computer, which, when executed by the computer, cause the computer to implement a method for determining leakage current in a CMOS circuit having a plurality of devices, the method comprising the steps of:

reading netlist data containing information on each of the plurality of devices and their respective connections within the circuit;

reading a plurality of input state data, each input state specifying input signals provided to the circuit;

determining which devices in the circuit are in an OFF state for each of the plurality of input state;

computing leakage current for each device in the OFF state according to the device position in the circuit for each of the plurality of input states and by combining any two devices that have the same source and drain connections if the devices are either both ON or OFF and replacing the two devices with a single device having a sum of their channel widths; and

providing resulting leakage information for each input state.

18. A data processing system comprising:

a keyboard;

a display;

a processor connected to the keyboard and the display and including an execution unit and a program memory containing a program method for determining leakage current in a CMOS circuit having a plurality of devices, the program method comprising the steps of;

reading netlist data containing information on each of the plurality of devices and their respective connections within the circuit;

reading a plurality of input state data, each input state specifying input signals provided to the circuit;

determining which devices in the circuit are in an OFF state for each of the plurality of input state;

computing leakage current only for each device in the OFF state according to the device position in the circuit for each of the plurality of input states and that do not have the same source and drain; and

providing resulting leakage information for each input state.