Semiconductor device and method of forming holes in substrate to interconnect top shield and ground shield

• US 7,906,371 B2
• Filed: 05/28/2008
• Issued: 03/15/2011
• Est. Priority Date: 05/28/2008
• Status: Active Grant

• Current Assignee: Stats Chippac Pte. Ltd. (JCET Group Co., Ltd.)
• Original Assignee: Stats Chippac Limited
• Inventors: Kim, OhHan, Kim, SunMi, Lee, KyungHoon
• Primary Examiner(s): WOJCIECHOWICZ, EDWARD JOSEPH
• Application Number:
  US12/128,116
• Publication Number:
  US 20090294928A1
• Time in Patent Office: 1,021 Days
• Field of Search: 438/106, 438/110, 438/112, 438/113, 438/126
• US Class Current: 438/113
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/05026 the internal layer being disposed in a recess of the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/29 characterised by the material , e.g. carbon interlayer dielectrics H01L23/5329
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/3135 Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A shielded semiconductor device is made by embedding a ground shield between layers of a substrate. Semiconductor die are mounted to the substrate over the ground shields. An encapsulant is formed over the semiconductor die and substrate. The encapsulant is diced to form dicing channels between the semiconductor die. A plurality of openings is drilled into the substrate along the dicing channels down through the ground shield on each side of the semiconductor die. A top shield is formed over the semiconductor die. The openings in the substrate are filled with a shielding material to electrically and mechanically connect the top shield to the ground shield. The substrate is singulated to separate the semiconductor die with top shield and ground shield into individual semiconductor devices. IPDs in the semiconductor die generate electromagnetic interference which is blocked by the respective top shield and ground shield.

Claims

1. A method of making a shielded semiconductor device, comprising:

providing a multi-layer substrate;

disposing a ground shield between layers of the substrate, the ground shield being electrically connected to a ground point;

mounting a plurality of semiconductor die to the substrate over the ground shield, the ground shield extending beyond a footprint of the plurality of semiconductors die;

forming an encapsulant over the semiconductor die and substrate;

dicing the encapsulant to form dicing channels between the semiconductor die;

forming a plurality of openings in the substrate along the dicing channels through the ground shield which extends under dicing channels;

forming a top shield over the semiconductor die;

filling the openings in the substrate with shielding material to electrically and mechanically connect the top shield to the ground shield.

2. The method of claim 1, wherein the top shield and ground shield are each made with shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.

3. The method of claim 1, wherein the step of forming openings in the substrate includes drilling holes in the substrate along the dicing channels through the ground shield.

4. The method of claim 1, wherein the openings in the substrate are formed on each side of the semiconductor die.

5. The method of claim 1, further including singulating the substrate to separate the semiconductor die with the top shield and ground shield into individual semiconductor devices.

6. The method of claim 1, further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the respective top shield and ground shield.

7. The method of claim 6, wherein the respective top shield and ground shield inhibit electromagnetic interference from reaching the integrated passive device in the semiconductor die.

8. A method of making a shielded semiconductor device, comprising:

providing a substrate;

embedding a ground shield within the substrate;

mounting a semiconductor die to the substrate over the ground shield, the ground shield extending beyond a footprint of the semiconductor die;

forming an encapsulant over the semiconductor die and substrate;

forming dicing channels around the semiconductor die;

forming a plurality of openings in the substrate along the dicing channels through the ground shield which extends under the dicing channels;

forming a top shield over the semiconductor die; and

filling the openings in the substrate with conductive material to electrically and mechanically connect the top shield to the ground shield.

9. The method of claim 8, wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.

10. The method of claim 8, wherein the step of forming openings in the substrate includes drilling holes in the substrate along the dicing channels through the ground shield.

11. The method of claim 8, wherein the openings in the substrate are formed on each side of the semiconductor die.

12. The method of claim 8, wherein the top shield and ground shield are each made with a shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.

13. The method of claim 8, further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the top shield and ground shield.

14. A method of making a shielded semiconductor device, comprising:

providing a substrate;

embedding a ground shield within the substrate;

mounting a semiconductor die to the substrate over the ground shield;

forming a plurality of openings in the substrate through the ground shield;

forming a top shield over the semiconductor die; and

filling the openings in the substrate with conductive material to electrically and mechanically connect the top shield to the ground shield.

15. The method of claim 14, wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.

16. The method of claim 14, further including:

forming an encapsulant over the semiconductor die and substrate; and

forming dicing channels around the semiconductor die.

17. The method of claim 14, wherein the step of forming openings in the substrate includes drilling holes in the substrate through the ground shield.

18. The method of claim 14, wherein the openings in the substrate are formed on each side of the semiconductor die.

19. The method of claim 14, further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the top shield and ground shield.

20. A method of making a shielded semiconductor device, comprising:

providing a substrate;

embedding a ground shield within the substrate;

mounting a semiconductor die to the substrate over the ground shield;

forming an encapsulated over the semiconductor die and substrate;

forming dicing channels around the semiconductor die;

forming a plurality of openings in the substrate along the dicing channels through the ground shield;

forming a top shield over the semiconductor die; and

filling the openings in the substrate with conductive material to electrically and mechanically connect the top shield to the ground shield.

21. The method of claim 20, wherein the substrate is a multi-layer substrate and the ground shield is disposed between layers of the substrate.

22. The method of claim 20, wherein the steps of forming openings in the substrate includes drilling holes in the substrate along the dicing channels through the grounds shield.

23. The method of claim 20, wherein the top shield and ground shield are each made with a shielding material selected from the group consisting of copper, aluminum, stainless steel, nickel silver, low-carbon steel, and silicon-iron steel.

24. The method of claim 20, further including disposing an integrated passive device in the semiconductor die, the integrated passive device generating electromagnetic interference which is blocked by the top shield and ground shield.