Semiconductor integrated circuit
First Claim
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1. A semiconductor integrated circuit comprising:
- a first well of a first polarity to which a first potential is given;
a second well of the first polarity to which a second potential different from the first potential is given;
a third well of a second polarity different from the first polarity;
a circuit element on the third well;
a circuit in which NMOS transistors are connected in parallel is formed on the first well; and
a circuit in which NMOS transistors are connected in series is formed on the second well, wherein;
the first well is insulated from a power source or ground to which a source of a MOSFET formed on the first well is connected, andthe third well is disposed between the first and second wells in adjacent relation to the first and second wells.
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Abstract
A semiconductor integrated circuit has a first substrate of a first polarity to which a first substrate potential is given, a second substrate of the first polarity to which a second substrate potential different from the first substrate potential is given, and a third substrate of a second polarity different from the first polarity. The first substrate is insulated from a power source or ground to which a source of a MOSFET formed on the substrate is connected. The third substrate is disposed between the first and second substrates in adjacent relation to the first and second substrates. A circuit element is formed on the third substrate.
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28 Claims
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1. A semiconductor integrated circuit comprising:
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a first well of a first polarity to which a first potential is given; a second well of the first polarity to which a second potential different from the first potential is given; a third well of a second polarity different from the first polarity; a circuit element on the third well; a circuit in which NMOS transistors are connected in parallel is formed on the first well; and a circuit in which NMOS transistors are connected in series is formed on the second well, wherein; the first well is insulated from a power source or ground to which a source of a MOSFET formed on the first well is connected, and the third well is disposed between the first and second wells in adjacent relation to the first and second wells. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28)
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Specification