Phase-detector-less method and apparatus for minimizing skew between bonded channel groups
First Claim
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1. A method for aligning a plurality of transmit sources, comprising method operations of:
- transmitting a bit sequence pattern over a corresponding channel of the plurality of transmit sources to respective differential buffers;
generating differential signals from the respective differential buffers;
combining a differential signal from a first differential buffer with a complementary differential signal from a second differential buffer to generate a combined signal pattern; and
comparing the combined signal pattern to an acceptable bit sequence pattern to determine whether to adjust one of the plurality of transmit sources for alignment.
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Abstract
A method for aligning output from a first transmit source and a second transmit source is provided. The method includes combining complementary portions of differential signals generated from respective transmit sources to generate an output bit sequence and comparing the output bit sequence with an input bit sequence used to generate the differential signals. The method further includes adjusting one of the first or the second transmit source based on the comparison to align the output from the first and the second transmit sources. A PLD having the capability to align channels of different octets is also provided.
16 Citations
24 Claims
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1. A method for aligning a plurality of transmit sources, comprising method operations of:
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transmitting a bit sequence pattern over a corresponding channel of the plurality of transmit sources to respective differential buffers; generating differential signals from the respective differential buffers; combining a differential signal from a first differential buffer with a complementary differential signal from a second differential buffer to generate a combined signal pattern; and comparing the combined signal pattern to an acceptable bit sequence pattern to determine whether to adjust one of the plurality of transmit sources for alignment. - View Dependent Claims (2, 3, 4, 5)
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6. A method for aligning signals from a plurality of sources, comprising method operations of:
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transmitting a bit sequence pattern over a channel of each of the plurality of sources; generating synchronization lanes on each channel; combining a signal polarity and a complementary signal polarity from different synchronization lanes to generate an output bit sequence pattern; adjusting output from one of the plurality of sources based on comparison of the output bit sequence pattern with the bit sequence pattern. - View Dependent Claims (7, 8, 9, 10)
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11. A method for aligning output from a first transmit source and a second transmit source, comprising method operations of:
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combining complementary portions of differential signals generated from respective transmit sources to generate an output bit sequence; comparing the output bit sequence with an input bit sequence used to generate the differential signals; and adjusting one of the first or the second transmit source based on the comparison to align the output from the first and the second transmit sources. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A method for aligning output from a first and a second transmit sources, comprising method operations of:
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generating a bit pattern having a frequency that is a fraction of an operating frequency to be output by the first and the second transmit sources; generating differential signals from each respective bit pattern; combining complementary portions of differential signals, where one portion is associated with the first transmit source and another portion is associated with the second transmit source; adjusting a phase of the bit pattern of the first transmit source based on a comparison of an output from the combining and the bit pattern; and applying the adjusting to remaining channels within the first transmit source. - View Dependent Claims (19, 20)
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21. A programmable logic device (PLD), comprising:
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a first and a second set of channels, wherein each of the first set and the second set of channels includes a channel designated as a synchronization lane over which a bit pattern is transmitted; a first differential buffer receiving data from the channel designated as the synchronization lane for the first set; a second differential buffer receiving data from the channel designated as the synchronization lane for the second set; a receive buffer receiving both an output signal having a polarity from the first differential buffer and an output signal having a complementary polarity from the second differential buffer; and a demultiplexer receiving output of the receive buffer, the demultiplexer providing an output bit pattern, wherein the output bit pattern is compared to the bit pattern to determine whether to adjust a phase of the bit pattern over the channel of one of the first or the second set of channels. - View Dependent Claims (22, 23, 24)
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Specification