Multiple doping level bipolar junctions transistors and method for forming

• US 7,910,425 B2
• Filed: 03/19/2010
• Issued: 03/22/2011
• Est. Priority Date: 09/29/2004
• Status: Active Grant

• Current Assignee: Bell Semiconductor, LLC (Hilco Inc. (d/b/a Hilco Global))
• Original Assignee: Agere Systems Incorporated (Broadcom, Inc.)
• Inventors: Carroll, Michael Scott, Key, Roger W., Lai, Thiet The, Hamad, Amal Ma, Kerr, Daniel Charles
• Primary Examiner(s): LE, THAO P
• Application Number:
  US12/727,304
• Publication Number:
  US 20100173459A1
• Time in Patent Office: 368 Days
• Field of Search: 257/E33.016, 257/E33.027, 257/E33.021, 257/E29.14, 438/309, 438/235
• US Class Current: 438/235
• CPC Class Codes: H01L 21/8249 Bipolar and MOS technology
• CPC Class Codes: H01L 27/0623 in combination with bipolar transistors
• CPC Class Codes: H01L 27/0928 comprising both N- and P- wells in the substrate, e.g. twin-tub
• CPC Class Codes: H01L 29/0821 Collector regions of bipolar transistors
• CPC Class Codes: H01L 29/66272 Silicon vertical transistors H01L29/66242, H01L29/66257 and H01L29/66265 take precedence

Abstract

A process for forming bipolar junction transistors having a plurality of different collector doping densities on a semiconductor substrate and an integrated circuit comprising bipolar junction transistors having a plurality of different collector doping densities. A first group of the transistors are formed during formation of a triple well for use in providing triple well isolation for complementary metal oxide semiconductor field effect transistors also formed on the semiconductor substrate. Additional bipolar junction transistors with different collector doping densities are formed during a second doping step after forming a gate stack for the field effect transistors. Implant doping through bipolar transistor emitter windows forms bipolar transistors having different doping densities than the previously formed bipolar transistors. According to one embodiment of the present invention, bipolar junction transistors having six different collector dopant densities (and thus six different breakdown characteristics) are formed.

Claims

1. A process for forming bipolar junction transistors and metal oxide semiconductor field effect transistors over a substrate, the process comprising:

forming a first doped tub and a plurality of doped collector sinker regions within the substrate;

forming a second and a third doped tub within the substrate;

forming a triple well region for cooperating with the second and the third doped tubs to electrically isolate the first doped tub from the substrate and forming a first plurality of subcollector regions comprising a first doping level;

forming structures associated with the metal oxide semiconductor field effect transistor;

doping a first subset of the first plurality of subcollector regions to form a second plurality of subcollector regions while doping other regions of the substrate to form a third plurality of subcollector regions, wherein the second plurality of subcollector regions comprise a second doping level and the third plurality of subcollector regions comprise a third doping level; and

doping a second subset of the first plurality of subcollector regions to form a fourth plurality of subcollector regions while doping a subset of the third plurality of subcollector regions to form a fifth plurality of subcollector regions and while doping a subset of the first subset of the first plurality of subcollector regions to form a sixth plurality of subcollector regions, wherein the fourth plurality of subcollector regions comprise a fourth doping level, and wherein the fifth plurality of subcollector regions comprise a fifth doping level, and wherein the sixth plurality of subcollector regions comprise a sixth doping level.

2. The process of claim 1 further comprising forming a base region and an emitter over the subcollector and doped sinker region in each of the first, second, third, and fourth BJT regions.

3. The process of claim 2 wherein BJT in the first, second, third, and fourth BJT regions exhibit different breakdown characteristics according their respective doping levels.

4. The process of claim 1 wherein forming structures associated with the metal oxide semiconductor field effect transistor further comprises depositing a layer of polysilicon and forming a gate for the metal oxide semiconductor field effect transistor.

5. The process of claim 1, wherein the subcollectors in the first, second and fourth BJT regions and the triple wells in the first MOSFET region are formed using a first mask.

6. The process of claim 5, wherein concurrently doping unmasked portions of the doped sinker regions in the first, second, third and fourth BJT regions and the first doped tub regions with the second type dopant includes using a second mask different from the first mask.

7. The process of claim 6, wherein doping the third and fourth BJT regions with the second dopant type to form a subcollector in the third BJT region and further doping the subcollector in the fourth BJT region includes using a third mask different from the first and second masks.

8. A process for forming bipolar junction transistors in a semiconductor substrate further comprising a metal oxide semiconductor field effect transistor, the process comprising:

forming a first doped tub and a plurality of doped collector sinker regions within the substrate;

forming a second and a third doped tub within the substrate;

forming a triple well region for cooperating with the second and the third doped tubs to electrically isolate the first doped tub from the substrate and forming a first plurality of subcollector regions comprising a first doping level;

forming structures associated with the metal oxide semiconductor field effect transistor;

doping a first subset of the first plurality of subcollector regions to form a second plurality of subcollector regions while doping other regions of the substrate to form a third plurality of subcollector regions, wherein the second plurality of subcollector regions comprise a second doping level and the third plurality of subcollector regions comprise a third doping level; and

doping a second subset of the first plurality of subcollector regions to form a fourth plurality of subcollector regions while doping a subset of the third plurality of subcollector regions to form a fifth plurality of subcollector regions and while doping a subset of the first subset of the first plurality of subcollector regions to form a sixth plurality of subcollector regions, wherein the fourth plurality of subcollector regions comprise a fourth doping level, and wherein the fifth plurality of subcollector regions comprise a fifth doping level, and wherein the sixth plurality of subcollector regions comprise a sixth doping level.

9. The process of claim 8 further comprising forming a base region and an emitter region for cooperating with one of the first, second, third, fourth, fifth and sixth subcollector region and one of the plurality of doped collector sinker regions to form, respectively, a first, second, third, fourth, fifth and sixth bipolar junction transistor.

10. The process of claim 9 wherein the first, second, third, fourth, fifth and sixth bipolar junction transistors exhibit breakdown characteristics in the following order beginning with the bipolar junction transistor having the highest breakdown voltage, according to the doping level of the subcollector, the first doping level, the fourth doping level, the third doping level, the second doping level, the fifth doping level and the sixth doping level.

11. The process of claim 8 wherein the step of forming structures associated with the metal oxide semiconductor field effect transistor further comprises depositing a layer of polysilicon and forming a gate for the metal oxide semiconductor field effect transistor.

12. The process of claim 8 wherein the structures associated with the metal oxide semiconductor field effect transistor comprise a gate structure, and wherein the step of forming structures associated with the metal oxide semiconductor field effect transistor is executed after the step of forming the triple well region and the first plurality of subcollector regions and before the step of doping the first subset of the first plurality of subcollector regions.

13. The process of claim 12 wherein the step of forming structures associated with the metal oxide semiconductor field effect transistor is executed before the step of doping the first subset of the first plurality of subcollector regions.

14. The process of claim 8 further comprising forming material layers overlying the substrate and forming emitter windows within one or more of the material layers, wherein the step of doping the second subset of the first plurality of subcollector regions while doping a subset of the third plurality of subcollector regions and while doping a subset of the first subset of the first plurality of subcollector regions comprises doping through the emitter windows.