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Storage nitride encapsulation for non-planar sonos NAND flash charge retention

  • US 7,910,453 B2
  • Filed: 07/14/2008
  • Issued: 03/22/2011
  • Est. Priority Date: 07/14/2008
  • Status: Expired due to Fees
First Claim
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1. A method of manufacturing a microelectronic device, comprising:

  • forming recessed shallow trench isolation (STI) features in a semiconductor substrate, defining a semiconductor region between adjacent two of the recessed STI features;

    forming a tunnel dielectric feature within the semiconductor region;

    forming a nitride layer on the recessed STI features and the tunnel dielectric feature;

    etching the nitride layer to form nitride openings within the recessed STI features;

    partially removing the recessed STI features through the nitride openings, resulting in gaps between the nitride layer and the recessed STI features; and

    forming a first dielectric material on surfaces of the nitride layer, sealing the nitride openings.

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