Semiconductor apparatus including a double-sided electrode element and method for manufacturing the same

• US 7,911,023 B2
• Filed: 11/04/2008
• Issued: 03/22/2011
• Est. Priority Date: 11/06/2007
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Yamaguchi, Hitoshi, Fujii, Tetsuo, Akagi, Nozomu
• Primary Examiner(s): Le; Thao X
• Assistant Examiner(s): Ida; Geoffrey
• Application Number:
  US12/289,772
• Publication Number:
  US 20090114985A1
• Time in Patent Office: 868 Days
• Field of Search: 257/511, 257/374
• US Class Current: 257/511
• CPC Class Codes: H01L 22/14 for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
• CPC Class Codes: H01L 27/0921 Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the semiconductor substrate. A current flows between the first and second electrode. Each double-sided electrode element has a PN column region located in the semiconductor substrate. The semiconductor apparatus further includes an insulation trench that surrounds each of multiple double-sided electrode elements, and that insulates and separates the multiple double-sided electrode elements from each other.

Claims

1. A semiconductor apparatus comprising:

a semiconductor substrate that has a first surface and a second surface opposite to each other, and that has a plurality of element forming regions;

an insulation trench that surrounds each of the plurality of element forming regions, and that insulates and separates the plurality of element forming regions from each other; and

a plurality of elements that is respectively located in the plurality of element forming regions, wherein the plurality of elements includes at least two double-sided electrode elements, wherein each double-sided electrode element includes;

a first electrode that is located on one of the first surface and the second surface of the semiconductor substrate;

a second electrode that is located on the other of the first surface and the second surface of the semiconductor substrate, wherein the double-sided electrode element is configured so that a current flows between the first electrode and the second electrode;

a PN column region that is located in the semiconductor substrate, and that includes a plurality of P conductivity type semiconductor parts and a plurality of N conductivity type semiconductor parts, wherein the plurality of P conductivity type semiconductor parts and the plurality of N conductivity type semiconductor parts are alternately and adjacently arranged in series with each other without an insulating film therebetween in a direction perpendicular to a thickness direction of the semiconductor substrate; and

a drift region that is provided by one of;

the plurality of P conductivity type semiconductor parts; and

the plurality of N conductivity type semiconductor parts of the PN column region wherein the at least two double-sided electrode elements include at least one P channel type double-sided electrode element and at least one N channel type double-sided electrode element;

the at least one P channel type double-sided electrode element utilizes the plurality of P conductivity type semiconductor parts as the drift region; and

the at least one N channel type double-sided electrode element utilizes the plurality of N conductivity type semiconductor parts as the drift region.

2. The semiconductor apparatus according to claim 1, wherein each double-sided electrode element is a vertical type MOS transistor element.

3. The semiconductor apparatus according to claim 1, wherein:

each double-sided electrode element has a channel region;

the channel region is located in the semiconductor substrate, and is located between the PN column region and the first surface of the semiconductor substrate;

a conductivity type of the channel region of each double-sided electrode element is opposite to that of the drift region of the double-sided electrode element; and

the first electrode and the second electrode of each double-sided electrode element are respectively located on the first surface and the second surface of the semiconductor substrate.

4. The semiconductor apparatus according to claim 3, wherein:

respective second electrodes of the at least two double-sided electrode elements are integrated into a common electrode.

5. The semiconductor apparatus according to claim 3, wherein:

the first electrode of one of the double-sided electrode elements is electrically separated from the first electrode of another double-sided electrode element; and

the second electrode of the one of the double-sided electrode elements is electrically separated from the second electrode of the another double-sided electrode element.

6. The semiconductor apparatus according to claim 1, wherein:

the insulation trench penetrates the semiconductor substrate from the first surface to the second surface.

7. The semiconductor apparatus according to claim 4, wherein:

the at least two double-sided electrode elements sharing the common electrode are insulated and separated from each other by the insulation trench; and

the insulation trench extends from the first surface of the semiconductor substrate to an end of the PN column region, the end being located on the second surface side of the semiconductor substrate.

8. The semiconductor apparatus according to claim 1, wherein:

the plurality of elements further includes at least one single-sided electrode element;

each single-sided electrode element has a pair of electrode, which are a third electrode and a fourth electrode; and

both of the third electrode and the fourth electrode are located on one of the first surface and the second surface of the semiconductor substrate.

9. The semiconductor apparatus according to claim 1, wherein:

the insulation trench has a trench wall; and

the insulation trench has an one of;

an insulator that fills in the trench wall; and

a cavity that is located inside the trench wall.

10. The semiconductor apparatus according to claim 1, wherein:

the insulation trench has a trench wall, an trench insulation film located on the trench wall, and a conductor; and

the insulation trench is filled with the conductor that is located inside the trench insulation film.

11. The semiconductor apparatus according to claim 10 wherein:

an electric potential of the conductor is fixed to a predetermined value.

12. The semiconductor apparatus according to claim 11, wherein

the conductor is electrically connected with the second electrode.

13. The semiconductor apparatus according to claim 12, further comprising:

a line element that is located on the first surface of the semiconductor substrate, wherein;

the line element is electrically connected with the conductor, so that an electric potential of the second electrode can be monitored through the line element and the conductor.

14. The semiconductor apparatus according to claim 12, further comprising:

a line element that is located on the first surface of the semiconductor substrate, and that is electrically connected with the conductor, wherein;

the plurality of elements includes a first element provided differently from the at least two double-sided electrode elements; and

the conductor is electrically connected with the first element through the line element.

15. The semiconductor apparatus according to claim 1, wherein the insulation trench according to claim 1 is a first insulation trench, the semiconductor apparatus further comprising:

a second insulation trench, wherein;

a portion of the second insulation trench and a portion of the first insulation trench are located between adjacent element forming regions;

the portion of the second insulation trench and the portion of the first insulation trench define an inter-element region therebetween; and

the inter-element region is located between the adjacent element forming regions.

16. The semiconductor apparatus according to claim 15, wherein

the inter-element region has a PN column region, a configuration of which is substantially similar to that of each double-sided electrode element.

17. The semiconductor apparatus according to claim 15, wherein

an electric potential of the inter-element region is fixed to a predetermined value.

18. The semiconductor apparatus according to claim 17, wherein

the inter-element region is electrically connected with the second electrode.

19. The semiconductor apparatus according to claim 1, wherein the insulation trench according to claim 1 is a first insulation trench, the semiconductor apparatus further comprising:

a second insulation trench, wherein;

each of the first insulation trench and the second insulation trench surrounds at least one of the element-forming regions.