Voltage level shifter for arbitrary input signals

• US 7,911,255 B2
• Filed: 07/21/2010
• Issued: 03/22/2011
• Est. Priority Date: 04/11/2008
• Status: Active Grant

• Current Assignee: Microsemi Corporation (Microchip Technology Incorporated)
• Original Assignee: Asic Advantage Inc. (Microchip Technology Incorporated)
• Inventors: Ochi, Sam Seiichiro
• Primary Examiner(s): Mai; Lam T
• Application Number:
  US12/840,996
• Publication Number:
  US 20100315150A1
• Time in Patent Office: 244 Days
• Field of Search: 327/333, 327/58, 327/108, 326/68, 326/63, 326/80, 326/81, 326/83, 326/84, 330/258, 365/201, 365/189.11, 323/312, 323/268, 323/273
• US Class Current: 327/333
• CPC Class Codes: H03F 2200/291 the level shifting stage between two amplifying stages being realised by a source follower
• CPC Class Codes: H03F 3/2173 of the bridge type
• CPC Class Codes: H03K 17/6874 in a symmetrical configuration
• CPC Class Codes: H03K 19/018564 with at least one differential stage H03K19/018578 takes precedence

Abstract

Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.

Claims

1. A voltage level shifting system comprising:

a conversion subsystem, configured to convert an input voltage signal into complementary input signals and to use the complementary input signals to drive active devices, each active device manifesting a dynamic current resulting from parasitic capacitance associated with the active device;

a compensation subsystem, coupled with the conversion subsystem, and configured to generate compensation currents to compensate for the dynamic currents associated with the active devices and to generate compensated complementary signals corresponding to the complementary input signals; and

an output subsystem, coupled with the compensation subsystem, and configured to generate an output voltage signal from the compensated complementary signals, such that the output voltage signal is a level shifted version of the input voltage signal.

2. The voltage level shifting system of claim 1, wherein the conversion subsystem is configured to convert the input voltage signal into two complementary input signals, each used to drive one of two active devices, each active device configured to generate a complementary current signal that includes a signal current corresponding to its respective complementary input signal and the dynamic current resulting from its parasitic capacitance.

3. The voltage level shifting system of claim 1, wherein the compensation subsystem is configured to generate the compensation currents using the complementary input signals.

4. The voltage level shifting system of claim 1, wherein the compensation subsystem comprises a first half-circuit and a second half-circuit in communication with a first active device and a second active device of the conversion subsystem, the first half-circuit having a resistive network in communication with the first active device and a capacitive network in communication with the second active device, and the second half-circuit having a resistive network in communication with the second active device and a capacitive network in communication with the first active device, at least a portion of each capacitive network being designed to compensate for the parasitic capacitance associated with a respective one of the active devices.

5. The voltage level shifting system of claim 1, wherein the compensation subsystem comprises:

a first capacitive device configured to manifest a capacitance substantially equivalent to the parasitic capacitance of a second of the active devices, the second of the active devices being driven by a complement of the input voltage signal and having a drain terminal coupled with a second active device node, the first capacitive device being coupled between the second active device node and the input voltage signal so as to generate a first compensation current to compensate for the dynamic current of the second of the active devices; and

a second capacitive device configured to manifest a capacitance substantially equivalent to the parasitic capacitance of a first of the active devices, the first of the active devices being driven by the input voltage signal and having a drain terminal coupled with a first active device node, the second capacitive device being coupled between the first active device node and the complement of the input voltage signal so as to generate a second compensation current to compensate for the dynamic current of the first of the active devices.

6. The voltage level shifting system of claim 1, wherein the output system comprises a gain stage configured to receive the compensated complementary signals differentially so as to generate the output voltage signal according to a differential level between the compensated complementary signals.

7. The voltage level shifting system of claim 1, wherein the conversion subsystem comprises:

a first active device being a transistor driven by a first complementary input signal being the input voltage signal, a source terminal of the first active device being coupled with a first resistor that is further coupled with a current source, and a drain terminal of the first active device being coupled with a first active device node; and

a second active device being a transistor driven by a second complementary input signal being generated by passing the input voltage signal through an inverter, a source terminal of the second active device being coupled with a second resistor that is further coupled with the current source, and a drain terminal of the second active device being coupled with a second active device node.

8. The voltage level shifting system of claim 7, wherein the compensation subsystem comprises:

a first capacitor coupled between the first active device node and the second complementary input signal;

a second capacitor coupled between the first active device node and a bus voltage;

a third capacitor coupled between the second active device node and the first complementary input signal;

a fourth capacitor coupled between the second active device node and the bus voltage;

a third resistor coupled between the first active device node and a fourth resistor that is further coupled with the bus voltage; and

a fifth resistor coupled between the second active device node and the fourth resistor.

9. The voltage level shifting system of claim 8, wherein the output subsystem comprises:

an operational amplifier having a first differential input node coupled with the second complementary input signal and a second differential input node coupled with the first complementary input signal, and configured to generate the output voltage signal according to a differential level between the differential input nodes, and the operational amplifier being tied between the bus voltage and a reference level.

10. The voltage level shifting system of claim 1, wherein the input voltage signal comprises a non-periodic analog signal.

11. The voltage level shifting system of claim 1, wherein the output voltage signal represents information from the input voltage signal while having a different phase or amplitude.

12. The voltage level shifting system of claim 1, further comprising:

a packaging configured to house at least the compensation subsystem.

13. A method comprising:

driving active devices using complementary input signals, each active device manifesting a complementary current signal corresponding to a respective complementary input signal and a dynamic current resulting from parasitic capacitance associated with the active device;

generating compensation currents to compensate for the dynamic currents associated with the active devices;

generating compensated complementary signals corresponding to the complementary input signals using the complementary current signals compensated by the compensation currents; and

generating an output voltage signal from the compensated complementary signals, such that the output voltage signal is a level shifted version of the input voltage signal.

14. The method of claim 13, further comprising:

converting an input voltage signal into the complementary input signals.

15. The method of claim 13, wherein generating compensation currents to compensate for the dynamic currents associated with the active devices comprises:

generating a first compensation current to compensate for the dynamic current of a second of the active devices using a first capacitive device configured to manifest a capacitance substantially equivalent to the parasitic capacitance of the second of the active devices, the second of the active devices being driven by a complement of the input voltage signal and having a drain terminal coupled with a second active device node, the first capacitive device being coupled between the second active device node and the input voltage signal; and

generating a second compensation current to compensate for the dynamic current of a first of the active devices using a second capacitive device configured to manifest a capacitance substantially equivalent to the parasitic capacitance of the first of the active devices, the first of the active devices being driven by the input voltage signal and having a drain terminal coupled with a first active device node, the second capacitive device being coupled between the first active device node and the complement of the input voltage signal.

16. The method of claim 13, wherein generating an output voltage signal from the compensated complementary signals, such that the output voltage signal is a level shifted version of the input voltage signal comprises:

receiving the compensated complementary signals differentially at a gain stage so as to generate the output voltage signal according to a differential level between the compensated complementary signals.

17. A method comprising:

providing a compensation subsystem configured to generate compensation currents to compensate for dynamic currents associated with active devices and to generate compensated complementary signals corresponding to the complementary input signals,

the complementary input signals being generated according to an input voltage signal and configured to drive the active devices so that each generates a complementary current signal corresponding to a respective one of the complementary input signals and its dynamic current resulting from an associated parasitic capacitance,

each compensated complementary signal being generated according to a respective complementary current signal and compensated by a respective compensation current, such that the compensated complementary signals are usable differentially to generate an output voltage signal that is a level shifted version of the input voltage signal.

18. A system comprising:

means for driving active devices using complementary input signals, each active device manifesting a complementary current signal corresponding to a respective complementary input signal and a dynamic current resulting from parasitic capacitance associated with the active device;

means for generating compensation currents to compensate for the dynamic currents associated with the active devices;

means for generating compensated complementary signals corresponding to the complementary input signals using the complementary current signals compensated by the compensation currents; and

means for generating an output voltage signal from the compensated complementary signals, such that the output voltage signal is a level shifted version of the input voltage signal.

19. The system of claim 18, further comprising:

means for converting an input voltage signal into the complementary input signals.

20. The system of claim 18, wherein the means for generating the output voltage signal from the compensated complementary signals, such that the output voltage signal is a level shifted version of the input voltage signal comprises:

means for receiving the compensated complementary signals differentially at a gain stage so as to generate the output voltage signal according to a differential level between the compensated complementary signals.