Content addressable memory having bidirectional lines that support passing read/write data and search data

• US 7,911,818 B2
• Filed: 03/16/2009
• Issued: 03/22/2011
• Est. Priority Date: 03/16/2009
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Netlogic Microsystems Incorporated (Broadcom, Inc.)
• Inventors: Chu, Scott
• Primary Examiner(s): Hoang; Huan
• Assistant Examiner(s): Graham; Kretelia
• Application Number:
  US12/405,000
• Publication Number:
  US 20100232194A1
• Time in Patent Office: 736 Days
• Field of Search: 365/49.1, 365/49.11, 365/49.12, 365/49.13, 365/50, 365/49.15, 365/49.16, 365/49.17, 365/49.18, 711/108
• US Class Current: 365/49.1
• CPC Class Codes: G11C 15/04 using semiconductor elements

Abstract

A CAM column structure includes an interface that drives search data to a plurality of CAM cells via a search line pair. The CAM cells are divided into sections, each section including: a set of CAM cells, a bit line pair coupled to the set of CAM cells, a sense amplifier coupled to the bit line pair, a tri-state read buffer configured to drive read data from the sense amplifier to the search line pair, and a pair of tri-state write buffers configured to drive write data from the search line pair to the bit line pair. In one embodiment, the pair of tri-state write buffers is replaced by a pair of switches that couple the search line pair to the sense amplifier. The search line pair may be segmented by tri-state buffers, which are controlled to drive the search, read and write data along the search line pair.

Claims

1. A content addressable memory (CAM) array having a column that comprises:

a first plurality of CAM cells;

a first local bit line coupled to each of the first plurality of CAM cells, wherein data is read from and written to the first plurality of CAM cells on the first local bit line;

a first search line coupled to each of the first plurality of CAM cells, wherein search data is applied to the first plurality of CAM cells on the first search line;

a first sense amplifier coupled to the first local bit line;

a first tri-state read buffer having an input coupled to the first sense amplifier and an output coupled to the first search line; and

a column interface coupled to the first search line, wherein the column interface provides the search data on the first search line, and receives read data on the first search line.

2. The CAM array of claim 1, wherein the column further comprises:

a second plurality of CAM cells, each coupled to the first search line, wherein the search data is applied to the second plurality of CAM cells on the first search line;

a second local bit line coupled to each of the second plurality of CAM cells, wherein data is read from and written to the second plurality of CAM cells on the second local bit line, and wherein the second local bit line is isolated from the first local bit line;

a second sense amplifier coupled to the second local bit line; and

a second tri-state read buffer having an input coupled to the second sense amplifier and an output coupled to the first search line.

3. The CAM array of claim 1, wherein the column further comprises:

a second local bit line coupled to each of the first plurality of CAM cells, wherein data is read from and written to the first plurality of CAM cells on the second local bit line, and wherein the second local bit line is coupled to the first sense amplifier;

a second search line coupled to each of the first plurality of CAM cells, wherein the search data is applied to the first plurality of CAM cells on the second search line;

a first tri-state write buffer having an input coupled to the first search line and output coupled to the first local bit line; and

a second tri-state write buffer having an input coupled to the second search line and an output coupled to the second local bit line.

4. The CAM array of claim 1, wherein the column further comprises:

a second local bit line coupled to each of the first plurality of CAM cells, wherein data is read from and written to the first plurality of CAM cells on the second local bit line, and wherein the second local bit line is coupled to the first sense amplifier;

a second search line coupled to each of the first plurality of CAM cells, wherein the search data is applied to the first plurality of CAM cells on the second search line;

a second tri-state read buffer having an input coupled to the first sense amplifier and an output coupled to the second search line.

5. The CAM array of claim 1, wherein the column further comprises:

a first tri-state search buffer coupled to the first search line, wherein the first tri-state search buffer is configured to drive read data from the first tri-state read buffer to the column interface.

6. The CAM array of claim 5, wherein the column further comprises:

a second tri-state search buffer coupled to the first search line, wherein the second tri-state search buffer is configured to drive the search data from the column interface to the first plurality of CAM cells.

7. The CAM array of claim 5, further comprising a row interface coupled to receive a row address for accessing the column, wherein the row interface is coupled to control the first tri-state read buffer.

8. A content addressable memory (CAM) array having a column that comprises:

a column interface;

a first local search line coupled to the column interface;

a first plurality of CAM cell sets each of which includes;

a plurality of CAM cells, each coupled to the first local search line;

a local bit line coupled to each of the plurality of CAM cells in the CAM cell set, wherein local bit lines in different CAM cell sets are isolated from one another;

a local sense amplifier coupled to the local bit line; and

a tri-state read buffer having an input coupled to the local sense amplifier and an output coupled to the first search line.

9. The CAM array of claim 8, wherein the column further comprises:

a second local search line coupling the column interface to the first local search line; and

a first tri-state buffer having an input coupled to the first local search line and an output coupled to the second local search line.

10. The CAM array of claim 9, wherein the column further comprises:

a second tri-state buffer having an input coupled to the second local search line and an output coupled to the first local search line.

11. The CAM array of claim 10, wherein each of the first plurality of CAM cell sets further comprises a tri-state write buffer having an input coupled to the first search line and an output coupled to the local sense amplifier.

12. The CAM array of claim 11, further comprising:

a second plurality of CAM cell sets, each of which includes;

a plurality of CAM cells, each coupled to the second local search line;

a local bit line coupled to each of the plurality of CAM cells in the CAM cell set, wherein local bit lines in different CAM cell sets are isolated from one another;

a local sense amplifier coupled to the local bit line; and

a tri-state read buffer having an input coupled to the local sense amplifier and an output coupled to the second search line.

13. A method of operating a column of content addressable memory (CAM) cells comprising:

performing a search operation by routing a search data value from a column interface to a first set of the CAM cells on a first search line; and

performing a read operation by routing a read data value from a CAM cell to a local sense amplifier on a first bit line, and routing the read data value from the local sense amplifier to the column interface on the first search line, wherein performing the read operation comprises activating a tri-state read buffer to drive the read data value from the local sense amplifier to the first search line.

14. The method of claim 13, further comprising performing a write operation by routing a write data value from the column interface to the local sense amplifier on the first search line, and routing the write data value from the local sense amplifier to a CAM cell on the first bit line.

15. The method of claim 13, wherein the step of performing the search operation further comprises activating a tri-state buffer to drive the search data value from the first search line to a second search line, wherein the second search line provides the search data value to a second set of the CAM cells in the column.

16. A method of operating a column of content addressable memory (CAM) cells comprising:

performing a search operation by driving a search data value from a column interface to a first search line, and actively driving the search data value from the first search line to a second search line, wherein the first search line is coupled to a first set of CAM cells and the second search line is coupled to a second set of CAM cells; and

performing a read operation by routing a read data value from a CAM cell to a local sense amplifier on a first bit line, actively driving the read data value from the sense amplifier to the second search line, and actively driving the read data value from the second search line to the first search line, whereby the read data value is transmitted to the column interface.

17. The method of claim 16, further comprising performing a write operation by driving a write data value from the column interface to the first search line, actively driving the write data value from the first search line to the second search line, and actively driving the write data value from the second search line to the first bit line.

18. The method of claim 16, further comprising performing a write operation by driving a write data value from the column interface to the first search line, actively driving the write data value from the first search line to the second search line, connecting the second search line to the local sense amplifier, whereby the write data value is applied to the local sense amplifier, and then activating the local sense amplifier.

19. The method of claim 16, wherein the step of performing the search operation further comprises driving a complementary search data value from the column interface to a third search line and actively driving the complementary search data value from the third search line to a fourth search line, wherein the third search line is coupled to the first set of CAM cells and the fourth search line is coupled to the second set of CAM cells.

20. The method of claim 19, further comprising performing a write operation by driving a write data value from the column interface to the first search line, driving a complementary write data value from the column interface to the third search line, actively driving the write data value from the first search line to the second search line, actively driving the complementary write data value from the third search line to the fourth search line, actively driving the write data value from the second search line to the first bit line, and actively driving the complementary write data value from the fourth search line to a second bit line.

21. The method of claim 19, further comprising performing a write operation by driving a write data value from the column interface to the first search line, driving a complementary write data value from the column interface to the third search line, actively driving the write data value from the first search line to the second search line, actively driving the complementary write data value from the third search line to the fourth search line, connecting the second search line and the fourth search line to the local sense amplifier, whereby the write data value and complementary write data value are applied to the local sense amplifier, and then activating the local sense amplifier.