Network interface for decreasing power consumption

• US 7,912,989 B2
• Filed: 05/15/2002
• Issued: 03/22/2011
• Est. Priority Date: 05/16/2001
• Status: Active Grant

• Current Assignee: Ricoh Company Limited
• Original Assignee: Ricoh Company Limited
• Inventors: Ado, Keitaro, Nakayama, Yasunori, Tsunashima, Nobuaki
• Primary Examiner(s): Tang; Karen C
• Application Number:
  US10/147,111
• Publication Number:
  US 20020199026A1
• Time in Patent Office: 3,233 Days
• Field of Search: 710/129, 710/128, 713/322, 713/323, 713/324, 713/600, 713/500, 709/224, 709/250, 709/318, 709/253, 327/156, 327/157, 395/750
• US Class Current: 709/253
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3209 Monitoring remote activity, e.g. over telephone lines or network connections
• CPC Class Codes: G06F 1/3237 by disabling clock generation or distribution
• CPC Class Codes: H04L 12/12 Arrangements for remote connection or disconnection of substations or of equipment thereof
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

A network interface is provided, in which it has an active mode and at least one of a disconnect mode and a suspend mode, and performs a predetermined process when a release condition of the disconnect mode or the suspend mode is satisfied. The network interface includes a driving control circuit for stopping at least a part of driving clock generation circuits included in the network interface until the release condition of the disconnect mode or the suspend mode is satisfied from the time when the disconnect mode or the suspend mode is established, wherein the driving control circuit operates irrespective of a clock signal.

Claims

1. A network interface through which a resident device connects with a network to communicate with an opposite node on said network, said network interface comprising:

one or more driving clock generation circuits;

a PLL circuit configured to provide a clock signal to said one or more driving clock generation circuits; and

a driving control circuit configured to control said PLL circuit and said one or more driving clock generation circuits to stop generation of clock signals by said one or more driving clock generation circuits in said network interface and to stop generation of the clock signal by the PLL circuit, when a disconnect mode is established when said opposite node is not connected to said network,

wherein said driving control circuit controls said PLL circuit to resume generation of said clock signal when a release condition of said disconnect mode of said network interface is satisfied, and controls said one or more driving clock generation circuits to resume said generation of clock signals, when a predetermined time elapses after said release condition of said disconnect mode of said network interface is satisfied;

wherein said driving control circuit of said network interface includes a timer which determines whether said predetermined time has elapsed after said release condition has been satisfied.

2. The network interface as claimed in claim 1, said driving control circuit comprising:

an event detection circuit for detecting a change of a state between said network interface and a connected node as occurrence of an event; and

a clock control circuit for stopping at least a part of driving clock generation circuits included in said network interface until occurrence of said event is detected by said event detection circuit from the time when said disconnect mode is established.

3. The network interface as claimed in claim 2, wherein said event detection circuit detects a change of a state between said network interface and a connected node, or a change of a state of a predetermined signal in said network interface as occurrence of said event.

4. The network interface as claimed in claim 2, wherein said event detection circuit detects occurrence of said event on the basis of variation of at least one of a connect detection signal and a bias detection signal, in which said connect detection signal is detected by a connect detection circuit in a cable interface provided in said network interface and said bias signal is detected by a bias detection circuit in said cable interface.

5. The network interface as claimed in claim 2, wherein said event detection circuit detects occurrence of said event on the basis of variation of at least one of a connect detection signal, a bias detection signal and a Link Power Status (LPS) signal, in which said connect detection signal is detected by a connect detection circuit in a cable interface provided in said network interface, said bias detection signal is detected by a bias detection circuit in said cable interface, and LPS signal is output from an LINK chip provided in said network interface.

6. The network interface as claimed in claim 1, wherein said network interface connects at least one of a computer, a computer peripheral device and a storage device, to a network.

7. The network interface as claimed in claim 6, wherein said network interface recognizes the network according to a network protocol used in the network.

8. The network interface as claimed in claim 1, further comprising one or more power consuming parts, and said clock signal is supplied to said one or more power consuming parts when said driving clock generation circuits are not stopped.

9. The network interface as claimed in claim 1, further comprising one or more power consuming parts, wherein said one or more power consuming parts consume no substantial power when said one or more power consuming parts do not receive clock signals in said disconnect mode.

10. The network interface as claimed in claim 1, wherein said one or more driving clock generation circuits includes a Phase Lock Loop (PLL) circuit, and wherein said driving control circuit controls said PLL circuit in said one or more driving clock generation circuits to stop generation of clock signals by said one or more driving clock generation circuits.

11. The network interface as claimed in claim 1, further comprising an interface circuit configured to generate a connect detection signal and a bias detection signal, wherein said connect detection signal is asserted when the opposite node is connected to the network, and said bias detection signal is asserted when data is sent or received through said network by said network interface.

12. The network interface as claimed in claim 1, wherein said driving control circuit controls said one or more driving clock generation circuits to stop generation of said clock signals by said one or more driving clock generation circuits in said network interface, when a suspend mode is established, and resume said generation of clock signals by said one or more driving clock generation circuits in said network interface, when a release condition of said suspend mode of said network interface is satisfied, and wherein said suspend mode is established when said opposite node is connected and no data is being sent to or received from said opposite node.

13. A computer including a network interface for communicating via a network with an opposite node on said network, said network interface having an active mode and a disconnect mode, said network interface performing a predetermined process when an establishment condition or release condition of said disconnect mode is satisfied, said network interface comprising:

one or more driving clock generation circuits;

a PLL circuit configured to provide a clock signal to said one or more driving clock generation circuits; and

a driving control circuit configured to control said PLL circuit and at least a part of said one or more driving clock generation circuits to stop generation of clock signals by said one or more driving clock generation circuits in said network interface and to stop generation of the clock signal by the PLL circuit, when said disconnect mode is established when said opposite node is not connected to said network,

wherein said driving control circuit controls said PLL circuit to resume generation of said clock signal when the release condition of said disconnect mode of said network interface is satisfied, and controls said one or more driving clock generation circuits to resume said generation of clock signals, when a predetermined time elapses after said release condition of said disconnect mode of said network interface is satisfied;

wherein when said driving control circuit stops said at least a part of said one or more driving clock generation circuits, clock signals are not generated; and

wherein said driving control circuit of said network interface includes a timer which determines whether said predetermined time has elapsed after said release condition has been satisfied.

14. A printer including a network interface for communicating via a network with an opposite node on said network, said network interface having an active mode and a disconnect mode, said network interface performing a predetermined process when an establishment condition or release condition of said disconnect mode is satisfied, said network interface comprising:

one or more driving clock generation circuits;

a PLL circuit configured to provide a clock signal to said one or more driving clock generation circuits; and

a driving control circuit configured to control said PLL circuit and said one or more driving clock generation circuits to stop generation of clock signals by said one or more driving clock generation circuits in said network interface and to stop generation of the clock signal by the PLL circuit, when said disconnect mode is established when said opposite node is not connected to said network,

wherein said driving control circuit controls said PLL circuit to resume generation of said clock signal when the release condition of said disconnect mode of said network interface is satisfied, and controls said one or more driving clock generation circuits to resume said generation of clock signals, when a predetermined time elapses after said release condition of said disconnect mode of said network interface is satisfied;

wherein said driving control circuit of said network interface includes a timer which determines whether said predetermined time has elapsed after said release condition has been satisfied.

15. A storage device including a network interface for communicating via a network with an opposite node on said network, said network interface having an active mode and a disconnect mode, said network interface performing a predetermined process when an establishment condition or release condition of said disconnect mode is satisfied, said network interface comprising:

one or more driving clock generation circuits;

a PLL circuit configured to provide a clock signal to said one or more driving clock generation circuits; and

a driving control circuit configured to control said PLL circuit and at least a part of said one or more driving clock generation circuits to stop generation of clock signals by said one or more driving clock generation circuits in said network interface and to stop generation of the clock signal by the PLL circuit, when said disconnect mode is established when said opposite node is not connected to said network,

wherein said driving control circuit controls said PLL circuit to resume generation of said clock signal when the release condition of said disconnect mode of said network interface is satisfied, and controls said one or more driving clock generation circuits to resume said generation of clock signals, when a predetermined time elapses after said release condition of said disconnect mode of said network interface is satisfied;

wherein said driving control circuit of said network interface includes a timer which determines whether said predetermined time has elapsed after said release condition has been satisfied.

16. A network interface through which a resident device connects with a network to communicate with another device on said network, said network interface comprising:

an interface circuit configured to generate a connect detection signal that is asserted when said another device is connected to the network, and generate a bias detection signal that is asserted when data is sent or received through said network by said network interface;

a control part configured to establish a disconnect mode in said network interface when the connect detection signal is not asserted;

one or more driving clock generation circuits;

a PLL circuit configured to provide a clock signal to said one or more driving clock generation circuits;

a driving control circuit configured to control said PLL circuit and said one or more driving clock generation circuits to stop generation of clock signals by said one or more driving clock generation circuits in said network interface and to stop generation of the clock signal by the PLL circuit, when said disconnect mode is established when said opposite node is not connected to said network,

wherein said driving control circuit controls said PLL circuit to resume generation of said clock signal when a release condition of said disconnect mode of said network interface is satisfied, and controls said one or more driving clock generation circuits to resume said generation of clock signals, when a predetermined time elapses after said release condition of said disconnect mode of said network interface is satisfied,

wherein said driving control circuit of said network interface includes a timer which determines whether said predetermined time has elapsed after said release condition has been satisfied.

17. A computer including the network interface of claim 16.

18. A printer including the network interface of claim 16.

19. A storage device including the network interface of claim 16.

20. The network interface as claimed in claim 16, wherein said control part establishes a suspend mode in said network interface when the connect detection signal is asserted and the bias detection signal is not asserted.