III-V nitride substrate boule and method of making and using the same

• US 7,915,152 B2
• Filed: 02/02/2010
• Issued: 03/29/2011
• Est. Priority Date: 03/13/2000
• Status: Expired due to Term

• Current Assignee: Wolfspeed, Inc.
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Redwing, Joan M., Flynn, Jeffrey S., Tischler, Michael A., Brandes, George R., Vaudo, Robert P.
• Primary Examiner(s): Warden; Jill
• Assistant Examiner(s): Chorbaji; Monzer R
• Application Number:
  US12/698,144
• Publication Number:
  US 20100289122A1
• Time in Patent Office: 420 Days
• Field of Search: 422/1, 422/251, 422/245.1, 422/292, 422/307, 437/39, 437/100, 437/106, 437/48, 117/97, 117/88, 117/87, 117/952, 117/90, 117/95, 438/46, 438604-605, 438607-608, 438/787, 257/615, 257/103, 257/201, 257/627, 428/698
• US Class Current: 438/512
• CPC Class Codes: C30B 23/00 Single-crystal growth by condensing evaporated or sublimed materials
• CPC Class Codes: C30B 25/00 Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
• CPC Class Codes: C30B 25/02 Epitaxial-layer growth
• CPC Class Codes: C30B 25/183 being provided with a buffer layer, e.g. a lattice matching layer
• CPC Class Codes: C30B 29/403 AIII-nitrides
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: H01L 21/02389 Nitrides
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 21/02576 N-type
• CPC Class Codes: H01L 21/02579 P-type
• CPC Class Codes: H01L 21/02581 Transition metal or rare earth elements
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 33/32 containing nitrogen

Abstract

A boule formed by high rate vapor phase growth of Group III-V nitride boules (ingots) on native nitride seeds, from which wafers may be derived for fabrication of microelectronic device structures. The boule is of microelectronic device quality, e.g., having a transverse dimension greater than 1 centimeter, a length greater than 1 millimeter, and a top surface defect density of less than 10⁷ defects cm⁻². The Group III-V nitride boule may be formed by growing a Group III-V nitride material on a corresponding native Group III-V nitride seed crystal by vapor phase epitaxy at a growth rate above 20 micrometers per hour. Nuclear transmutation doping may be applied to an (Al,Ga,In)N article comprises a boule, wafer, or epitaxial layer.

Claims

1. A III-V nitride article comprising a boule, wafer, or epitaxial layer, doped by nuclear transmutation doping to yield a room temperature electron concentration of from 1E15 to 5E19 cm⁻

3, wherein the III-V nitride comprises at least one of AI and Ga, and an effective amount of AI or Ga metal atoms originally present in the article have been converted to a dopant element as a result of said nuclear transmutation doping, and the III-V nitride article further comprises an epitaxially compatible non-native seed crystal or substrate.

2. The (Al,Ga,In)N article of claim 1, having a surface offcut at an angle from the (0001) plane toward the <

1 100>

direction or the <

11 20>

direction.

3. The III-V nitride article of claim 1, having a surface offcut of up to 10 degrees from a primary crystal axis.

4. The III-V nitride article of claim 1, grown on a seed crystal having an orientation selected from the group consisting of c-axis, a-axis, m-axis, r-axis, and offcut at a nonzero angle less than 10 degrees from a primary crystal axis.

5. A III-V nitride article according to claim 1, comprising a boule having a thickness of at least 4 mm.

6. A III-V nitride article according to claim 1, characterized by a transverse dimension of at least 1.75 inches or a diameter of at least 1 inch.

7. A III-V nitride article according to claim 1, having a surface defect density of less than 10⁷ cm⁻

2.

8. A III-V nitride article according to claim 1, having a surface defect density of less than 10⁶ cm⁻

2.

9. A III-V nitride article according to claim 1, having a surface defect density of less than 10⁵ defects cm⁻

2, and a diameter of at least 5 centimeters.

10. A III-V nitride article according to claim 1, comprising a wafer or epitaxial layer having a surface with an RMS roughness of less than 5 Angstroms over a 10×

10 micrometers² area.

11. A III-V nitride article of claim 10, having a radius of curvature of greater than 1 meter.

12. A microelectronic device fabricated in or on a III-V nitride article comprising a wafer or epitaxial layer according to claim 1.

13. The microelectronic device of claim 12, selected from the group consisting of light emitting diodes, laser diodes, ultraviolet photodetectors, high electron mobility transistors, bipolar transistor, heterojunction bipolar transistor, wavelength division multiplexing components, and high power rectifiers.

14. A method comprising nuclear transmutation doping of a III-V nitride article comprising a boule, wafer, or epitaxial layer, wherein the III-V nitride comprises at least one of Al and Ga, and the method converts an effective amount of AI or Ga metal atoms originally present in the article to a dopant element as a result of said nuclear transmutation doping, further comprising one of the following steps (a) and (b):

(a) growing the III-V nitride article with a feed material comprising isotopically pure ₃₁⁷¹Ga; and

(b) growing the III-V nitride article on an epitaxially compatible non-native seed crystal or substrate.

15. A method according to claim 14, comprising growing the III-V nitride article with a feed material comprising isotopically pure ₃₁⁷¹Ga.

16. A method according to claim 15, further comprising growing the III-V nitride article on a III-V nitride seed crystal or substrate.

17. A method according to claim 14, further comprising diffusion of n-type, p-type, or deep level impurities at a temperature greater than 600 degrees C.

18. A method according to claim 14, comprising nuclear transmutation doping of a III-V nitride article comprising a boule.

19. A method according to claim 18, further comprising deriving a plurality of wafers from the boule following the nuclear transmutation doping.

20. A method according to claim 19, further comprising fabricating a microelectronic device structure on at least one wafer of the plurality of wafers.

21. A method according to claim 14, comprising nuclear transmutation doping of a III-V nitride article comprising a wafer or epitaxial layer.

22. A method according to claim 21, further comprising fabricating a microelectronic device structure on the wafer or epitaxial layer.

23. A method according to claim 14, further comprising growing the III-V nitride article via vapor phase epitaxy.

24. A method according to claim 14, further comprising growing the III-V nitride article on a seed crystal or substrate offcut up to 10 degrees from a primary crystal axis.

25. A method according to claim 14, further comprising offcutting the III-V nitride article at an angle of less than 10 degrees from a primary crystal axis.

26. A method according to claim 14, further comprising processing an a III-V nitride article comprising a wafer or epitaxial layer to yield a surface having an RMS roughness of less than 5 Angstroms over a 10×

10 micrometers² area.

27. A method according to claim 14, comprising growing the III-V nitride article on an epitaxially compatible non-native seed crystal or substrate.