Fabrication of channel wraparound gate structure for field-effect transistor
First Claim
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1. A method for fabricating a transistor comprising:
- forming a dummy gate over a semiconductor body where the body is disposed on a first dielectric layer;
forming source and drain regions in the body thereby defining a channel region in the body between the source and drain regions;
forming a second dielectric layer over the first dielectric layer;
removing the dummy gate;
seeding the first dielectric layer under the channel region with ions which enhance the etching of the first dielectric layer;
subsequently etching the first dielectric layer to define an opening under the channel region in the first dielectric layer; and
forming a gate insulation and a conductive gate surrounding the channel region.
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Abstract
A method for fabricating a field-effect transistor with a gate completely wrapping around a channel region is described. Ion implantation is used to make the oxide beneath the channel region of the transistor more etchable, thereby allowing the oxide to be removed below the channel region. Atomic layer deposition is used to form a gate dielectric and a metal gate entirely around the channel region once the oxide is removed below the channel region.
244 Citations
20 Claims
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1. A method for fabricating a transistor comprising:
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forming a dummy gate over a semiconductor body where the body is disposed on a first dielectric layer; forming source and drain regions in the body thereby defining a channel region in the body between the source and drain regions; forming a second dielectric layer over the first dielectric layer; removing the dummy gate; seeding the first dielectric layer under the channel region with ions which enhance the etching of the first dielectric layer; subsequently etching the first dielectric layer to define an opening under the channel region in the first dielectric layer; and forming a gate insulation and a conductive gate surrounding the channel region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method comprising:
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using a replacement gate process to expose a channel region of a transistor body disposed on a dielectric layer; implanting ions which enhance the etching of the dielectric layer into the dielectric layer underlying the channel region; subsequent to the implanting ions, etching the dielectric layer; and forming a gate insulation and gate substantially surrounding the channel region including underlying the channel region. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification