Thin film transistor, display device including the same and manufacturing method thereof

• US 7,915,689 B2
• Filed: 10/29/2008
• Issued: 03/29/2011
• Est. Priority Date: 12/18/2007
• Status: Expired due to Fees

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Song, Jun-Ho, Shim, Seung-Hwan, Kim, Hyung-Jun, Cho, Sung-Haeng, Jeong, Ki-Hun, Kim, Joo-Han
• Primary Examiner(s): Sandvik; Benjamin P
• Assistant Examiner(s): Kuo; W. Wendy
• Application Number:
  US12/260,464
• Publication Number:
  US 20090152554A1
• Time in Patent Office: 881 Days
• Field of Search: 257/390, 257/E27.081, 257/E29.273, 257/E29.288, 257/E29.289, 257/E29.292, 257/E29.299
• US Class Current: 257/390
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1229 with different crystal properties within a device or between different devices
• CPC Class Codes: H01L 27/1288 employing particular masking sequences or specially adapted masks, e.g. half-tone mask
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A thin film transistor, a display device, and a manufacturing method thereof. The thin film transistor includes a control electrode, a semiconductor overlapping the control electrode, and an input electrode and an output electrode disposed on or under the semiconductor and opposite to each other. The semiconductor includes a first portion disposed between the input electrode and the output electrode and having a first crystallinity, and a second portion connected with the first portion, which overlaps the input electrode or the output electrode, and having a second crystallinity. The first crystallinity is higher than the second crystallinity.

Claims

1. A display device comprising:

a first thin film transistor comprises a first control electrode, a first semiconductor which overlaps the first control electrode, and a first input electrode and a first output electrode opposite to each other adjacent to the first semiconductor;

a second thin film transistor comprises a second control electrode, a second semiconductor which overlaps the second control electrode, and a second input electrode and a second output electrode opposite to each other on or under the second semiconductor; and

a gate insulating layer disposed between the first control electrode and the second control electrode and the first semiconductor and the second semiconductor;

wherein the first semiconductor comprises a first portion disposed between the first input electrode and the first output electrode, and having a first crystallinity, and a second portion which overlaps the first input electrode or the first output electrode and having a second crystallinity,

wherein the first crystallinity is higher than the second crystallinity,

wherein the gate insulating layer comprises a third portion disposed under the first semiconductor and the second semiconductor; and

a fourth portion except for the third portion,

wherein the fourth portion is thinner than the third portion.

2. The display device of claim 1, wherein the second semiconductor comprises:

a fifth portion disposed between the second input electrode and the second output electrode; and

a sixth portion which overlaps the second input electrode and the second output electrode,

wherein the fifth portion and the sixth portion include amorphous semiconductor.

3. The display device of claim 2, wherein:

the first portion is thinner than the second portion; and

the third portion is thinner than the fourth portion.

4. The display device of claim 3, wherein

a thickness of the first portion is in a range of approximately 300 to approximately 1500 Å

.

5. The display device of claim 2, wherein:

the first thin film transistor is disposed in a driving unit; and

the second thin film transistor is disposed in a display unit,

the driving unit comprises

a gate driver connected with a first signal line, and

a data driver connected with a second signal line intersecting the first signal line, and

the first signal line and the second signal line are connected with the second thin film transistor.

6. The display device of claim 2, further comprising:

a first electrode connected with the first thin film transistor;

a second electrode opposite to the first electrode; and

an emission layer formed between the first electrode and the second electrode,

the first control electrode is electrically connected with the second output electrode.