Microfeature workpieces and methods for forming interconnects in microfeature workpieces

• US 7,915,736 B2
• Filed: 08/02/2007
• Issued: 03/29/2011
• Est. Priority Date: 09/01/2005
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Kirby, Kyle K., Hiatt, William M., Stocks, Richard L.
• Primary Examiner(s): Stark; Jarrett J
• Application Number:
  US11/832,742
• Publication Number:
  US 20070267754A1
• Time in Patent Office: 1,335 Days
• Field of Search: None
• US Class Current: 257/774
• CPC Class Codes: H01L 21/76868 Forming or treating discontinuous thin films, e.g. repair, enhancement or reinforcement of discontinuous thin films
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

Methods for forming interconnects in microfeature workpieces, and microfeature workpieces having such interconnects are disclosed herein. In one embodiment, a method of forming an interconnect in a microfeature workpiece includes forming a hole extending through a terminal and a dielectric layer to at least an intermediate depth in a substrate of a workpiece. The hole has a first lateral dimension in the dielectric layer and a second lateral dimension in the substrate proximate to an interface between the dielectric layer and the substrate. The second lateral dimension is greater than the first lateral dimension. The method further includes constructing an electrically conductive interconnect in at least a portion of the hole and in electrical contact with the terminal.

Claims

1. A microfeature workpiece, comprising:

a substrate;

a dielectric layer on the substrate;

a microelectronic die formed in and/or on the substrate, the die including a terminal on the dielectric layer and an integrated circuit operably coupled to the terminal; and

a hole extending through the terminal and the dielectric layer to at least an intermediate depth in the substrate, the hole having a first lateral dimension in the dielectric layer and a second lateral dimension in the substrate at an interface between the dielectric layer and the substrate, the second lateral dimension being greater than the first lateral dimension, and wherein the hole has a third lateral dimension in a portion of the substrate spaced apart from the interface between the dielectric layer and the substrate, the third lateral dimension being less than the second lateral dimension.

2. The microfeature workpiece of claim 1 wherein:

the dielectric layer comprises a first surface contacting the substrate; and

the hole is configured to expose a portion of the first surface of the dielectric layer.

3. The microfeature workpiece of claim 1 wherein the hole comprises an undercut portion in the substrate at the interface between the dielectric layer and the substrate.

4. The microfeature workpiece of claim 1, further comprising an electrically conductive interconnect in the hole and contacting the terminal.

5. The microfeature workpiece of claim 1, further comprising an electrically conductive interconnect in the hole and contacting the terminal, wherein the electrically conductive interconnect is electrically isolated from the substrate.

6. The microfeature workpiece of claim 1 wherein the hole comprises a blind hole that does not extend completely through the substrate.

7. The microfeature workpiece of claim 1 wherein the hole comprises a through hole that extends completely through the substrate.

8. The microfeature workpiece of claim 1 wherein the dielectric layer is a first dielectric layer, wherein the hole comprises a portion in the substrate at the interface between the dielectric layer and the substrate, and wherein the microfeature workpiece further comprises a second dielectric layer in at least the portion of the hole in the substrate.

9. The microfeature workpiece of claim 1 wherein the hole comprises a first hole section in the substrate at the interface between the dielectric layer and the substrate and a second hole section in the substrate adjacent to the first hole section, and wherein the first hole section has a major third lateral dimension and the second hole section has a major fourth lateral dimension less than the third lateral dimension.

10. The microfeature workpiece of claim 1 wherein the hole comprises a blind hole, and wherein the workpiece further comprises a vent in fluid communication with the blind hole.

11. The microfeature workpiece of claim 1 wherein the hole comprises a first section in the substrate at the interface between the dielectric layer and the substrate and a second section in the substrate adjacent to the first section, and wherein the first section has a first depth and the second section has a second depth less than the first depth.

12. A microfeature workpiece, comprising:

a substrate having a substrate surface;

a dielectric layer on the substrate surface;

a terminal on the dielectric layer;

an operable microelectronic feature carried by the substrate and operably coupled to the terminal; and

an interconnect via extending through the terminal and the dielectric layer to at least an intermediate depth in the substrate, the interconnect via including an undercut portion in the substrate proximate an interface between the dielectric layer and the substrate, the undercut portion being at a first depth from the substrate surface and having a first diameter, wherein the interconnect via also includes a hole portion proximate the undercut portion and extending into the substrate, the hole portion being at a second depth greater than the first depth, and wherein the hole portion has a second diameter smaller than the first diameter.

13. The microfeature workpiece of claim 12 wherein the interconnect via has a first lateral dimension in the dielectric layer and a second lateral dimension in the substrate at an interface between the dielectric layer and the substrate, the second lateral dimension being greater than the first lateral dimension.

14. The microfeature workpiece of claim 12 wherein:

the dielectric layer comprises a first surface contacting the substrate; and

the interconnect via is configured to expose a portion of the first surface of the dielectric layer.

15. The microfeature workpiece of claim 12, further comprising an electrically conductive interconnect in the interconnect via and contacting the terminal.

16. The microfeature workpiece of claim 12, further comprising an electrically conductive interconnect in the interconnect via and contacting the terminal, wherein the electrically conductive interconnect is electrically isolated from the substrate.

17. The microfeature workpiece of claim 12 wherein the interconnect via has a first major lateral dimension in the undercut portion of the substrate and a second major lateral dimension in a first portion of the substrate adjacent to the undercut portion, the second dimension being less than the first dimension.

18. The microfeature workpiece of claim 12 wherein the dielectric layer is a first dielectric layer, and wherein the microfeature workpiece further comprises a second dielectric layer in at least the section of the interconnect via in the substrate.

19. The microfeature workpiece of claim 12 wherein the interconnect via comprises a blind hole, and wherein the workpiece further comprises a vent in fluid communication with the blind hole.

20. The microfeature workpiece of claim 12 wherein the interconnect via comprises a first section in the substrate at the interface between the dielectric layer and the substrate and a second section in the substrate adjacent to the first section, and wherein the first section has a first depth and the second section has a second depth less than the first depth.

21. A microfeature workpiece, comprising:

a substrate;

a dielectric layer on the substrate;

a semiconductor die formed in and/or on the substrate, the semiconductor die including a terminal on the dielectric layer and an integrated circuit operably coupled to the terminal;

an aperture extending through the terminal and the dielectric layer into the substrate, the aperture having a first lateral dimension in the dielectric layer and a second lateral dimension in the substrate at an interface between the dielectric layer and the substrate, the second lateral dimension being greater than the first lateral dimension, and wherein the aperture has a third lateral dimension in a portion of the substrate spaced apart from the interface between the dielectric layer and the substrate, the third lateral dimension being less than the second lateral dimension; and

a conductive fill material substantially filling the aperture and in contact with the terminal.

22. The microfeature workpiece of claim 21 wherein the aperture comprises an undercut portion in the substrate at the interface between the dielectric layer and the substrate.

23. The microfeature workpiece of claim 21 wherein the dielectric layer is a first dielectric layer, wherein the aperture comprises an undercut in the substrate at the interface between the dielectric layer and the substrate, and wherein the microfeature workpiece further comprises a second dielectric layer substantially filing the undercut portion of the aperture.

24. The microfeature workpiece of claim 21 wherein the aperture comprises a first section in the substrate at the interface between the dielectric layer and the substrate and a second section in the substrate adjacent to the first section, and wherein the first section has a major third lateral dimension and the second section has a major fourth lateral dimension less than the third lateral dimension.