Delta-sigma signal density modulation for optical transducer control

• US 7,915,838 B2
• Filed: 06/29/2007
• Issued: 03/29/2011
• Est. Priority Date: 06/29/2007
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: VanEss, David
• Primary Examiner(s): Choi, Jacob Y
• Assistant Examiner(s): Vu, Jimmy T
• Application Number:
  US11/823,904
• Publication Number:
  US 20090001905A1
• Time in Patent Office: 1,369 Days
• Field of Search: 315/291, 315/302, 315/307, 341/56, 341/77, 341/143
• US Class Current: 315/302
• CPC Class Codes: H05B 45/10 Controlling the intensity of the light
• CPC Class Codes: H05B 45/37 Converter circuits

Abstract

A controller for optical transducers uses delta-sigma signal density modulation to reduce electromagnetic interference.

Claims

1. An apparatus, comprising:

a controllable current source coupled to a light-emitting diode; and

a modulator comprising a machine-readable medium containing data that, when read by a machine, causes the machine to perform operations comprising generating a delta-sigma signal density modulation waveform and coupled to the controllable current source,

wherein the modulator is configured to provide a delta-sigma modulation control signal to the controllable current source, the delta-sigma modulation control signal having a selected delta-sigma signal density to control an average luminous flux of the light-emitting diode.

2. The apparatus of claim 1, wherein the modulator comprises:

an n-bit adder comprising a first input, a second input, a first output and a second output, wherein the second output comprises the delta-sigma modulation control signal;

an n-bit accumulator comprising;

an input, coupled to the first output of the n-bit adder, to receive a first output value of the n-bit adder; and

an output coupled to the first input of the n-bit adder to provide a first input value to the n-bit adder; and

an n-bit signal density register, coupled to the second input of the n-bit adder, to provide a signal density value, wherein

the first output value of the n-bit adder comprises a remainder of a sum of the first input value and the second input value divided by 2ⁿ, and wherein

the second output value of the n-bit adder comprises an integer value of the sum of the first input value and the second input value divided by 2ⁿ.

3. The apparatus of claim 2, wherein the signal density register comprises a programmable register.

4. The apparatus of claim 2, wherein the controllable current source is configured to provide a first current level when the second output of the n-bit adder is a first value and to provide a second current level when the second output of the n-bit adder is a second value.

5. The apparatus of claim 4, wherein the first current level comprises a non-zero current level and the second current level is approximately zero.

6. The apparatus of claim 5, wherein the second current level comprises a non-zero current level and the first current level is approximately zero.

7. The apparatus of claim 1, wherein the light-emitting diode comprises an anode and a cathode, wherein a first terminal of the controllable current source is coupled to the anode, and wherein the controllable current source is configured to source current to the light-emitting diode.

8. The apparatus of claim 7, wherein the cathode of the light-emitting diode is coupled to a first voltage, wherein a second terminal of the controllable current source is coupled to a second voltage, and wherein the second voltage is positive with respect to the first voltage.

9. The apparatus of claim 1, wherein the light-emitting diode comprises an anode and a cathode, wherein a first terminal of the controllable current source is coupled to the cathode, and wherein the controllable current source is configured to sink current from the light-emitting diode.

10. The apparatus of claim 9, wherein the anode of the light-emitting diode is coupled to a first voltage, wherein a second terminal of the controllable current source is coupled to a second voltage, and wherein the first voltage is positive with respect to the second voltage.

11. A method, comprising:

providing a controllable current for a light emitting diode;

generating the delta-sigma modulation control signal,

controlling the current with a delta-sigma modulation control signal to control a luminous flux output of the light emitting diode; and

modulating the controllable current with the delta-sigma modulation control signal

wherein generating the delta-sigma signal density control signal comprises;

providing an n-bit modulation value A and an n-bit accumulator value B,

replacing the n-bit accumulator value B with a value modulo [(A+B)/2ⁿ], and

providing an output signal having a value equal to integer [(A+B)/2ⁿ].

12. The method of claim 11, further comprising:

providing a first current level to the light-emitting diode when the output signal has a first value; and

providing a second current level to the light-emitting diode when the output signal has a second value.

13. The method of claim 12, wherein the first current level comprises a non-zero current level and the second current level is approximately zero.

14. The method of claim 12, wherein the second current level comprises a non-zero current level and the first current level is approximately zero.