Process for monitor to operate in DPMS mode

• US 7,916,131 B2
• Filed: 11/02/2006
• Issued: 03/29/2011
• Est. Priority Date: 11/02/2006
• Status: Active Grant

• Current Assignee: Mitac Technology Corporation (MiTAC Holdings Corp.)
• Original Assignee: Mitac Technology Corporation (MiTAC Holdings Corp.)
• Inventors: Chiu, Chia-Chang
• Primary Examiner(s): Shalwala; Bipin
• Assistant Examiner(s): Holton; Steven E
• Application Number:
  US11/591,631
• Publication Number:
  US 20080106537A1
• Time in Patent Office: 1,608 Days
• Field of Search: 345211-213, 713/320, 713/323, 713/330, 725150-153
• US Class Current: 345/211
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/022 in absence of operation, e.g. no data being entered during a predetermined time
• CPC Class Codes: G09G 2370/12 Use of DVI or HDMI protocol in interfaces along the display data pipeline
• CPC Class Codes: G09G 5/003 Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto specific for a CRT G09G1/165; for a flat panel G09G3/2092

Abstract

A process for a monitor working in a DPMS mode applies when a monitor ends a working mode and enters the DPMS mode. In the DPMS mode, when the signal processor of the monitor detects there is no signal input to the connecting interface, the signal processor will be off and inform the micro-controller to open the signal detecting function to find whether there is a signal input to the connecting interface. When the micro-controller detects there is no signal input for a certain of time, the micro-controller will enter the sleep status. As a result, the purpose of saving the electricity can be achieved.

Claims

1. A process for a monitor to operate in a DPMS mode, which applies when a user switches the monitor from a first working mode to a second working mode and the monitor ends the first working mode and enters the DPMS mode, the process comprising the following steps:

detecting whether there is a signal input to a connecting interface for the second working mode by a signal processor;

when there is no signal input to the connecting interface, the signal processor informing a micro-controller to open a signal detecting function so that the micro-controller detects the signal input of the connecting interface;

turning off the signal processor;

detecting whether there is a potential change to a pin of the micro-controller;

when the pin has no potential change during a predetermined time interval,

the micro-controller entering a sleep mode and waiting for the pin having a potential change.

2. The process of claim 1, wherein a logic gate is used to connect the connecting interface to the pin of the micro-controller and is used to respond to the signal input of the connecting interface to produce a potential change of the pin.

3. The process of claim 1, wherein in the step of detecting whether there is a signal input to the connecting interface for the second working mode by the signal processor, when there is a signal input to the connecting interface, the monitor will end the DPMS mode and enter the second working mode and the signal processor will process the image display in the second working mode.

4. The process of claim 1, said step of detecting whether there is a potential change to a pin of the micro-controller, further comprising:

the micro-controller checking whether a frequency of the potential change has reached a predetermined value when the pin has a potential change; and

the micro-controller opening the signal processor and the signal processor starting to detect whether there is a signal input to the connecting interface when the frequency of the potential change has reached the predetermined value.

5. The process of claim 4, wherein when the frequency of the potential change has not reached the predetermined value, the micro-controller starts to check whether the pin has a potential change.

6. The process of claim 1, wherein in the step of the micro-controller checking whether the pin has no potential change during the predetermined time when the pin has no potential change, when the pin has a potential change during the predetermined time, the micro-controller will check whether the pin has a potential change.

7. The process of claim 2, wherein the logic gate is a NOR type logic gate.