Time-domain equalization for discrete multi-tone systems
First Claim
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1. A method for transmitting information in a VDSL communication system comprising:
- selecting a cyclic prefix length from a plurality of candidate lengths based on respective bit rates obtained for the candidate lengths; and
adding an end-portion of a block of information bits at a beginning of the block, wherein the added end-block portion has a length equal to the selected cyclic prefix length.
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Abstract
A multiple carrier communication system includes a primary impulse shortening filter that receives an output signal of an analog to digital converter and accepts coefficients. A secondary impulse shortening filter receives the output signal of the analog to digital converter, outputs an output signal, and passes coefficients to the primary impulse shortening filter. A reference signal generator outputs a reference signal. A comparator compares the output signal and the reference signal and outputs a resulting error signal. An adaptive processor computes coefficients for the secondary impulse shortening filter based on the error signal.
229 Citations
14 Claims
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1. A method for transmitting information in a VDSL communication system comprising:
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selecting a cyclic prefix length from a plurality of candidate lengths based on respective bit rates obtained for the candidate lengths; and adding an end-portion of a block of information bits at a beginning of the block, wherein the added end-block portion has a length equal to the selected cyclic prefix length. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of dynamically selecting a cyclic prefix length in a VDSL communication system, the method comprising:
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computing a respective maximum bit rate value for each of a plurality of candidate cyclic prefix lengths; identifying a particular one of the candidate cyclic prefix lengths having the largest maximum bit rate value of the computed maximum bit rate values; and adding an end-portion of a block of information bits at a beginning of the block, wherein the added end-block portion has a length equal to the particular one candidate cyclic prefix length. - View Dependent Claims (8, 9, 10, 11)
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12. A VDSL communication system comprising:
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a VDSL receiver comprising; logic that computes a bit rate value for each of a plurality of candidate cyclic prefix lengths; a transmitter that transmits the bit rate values; a VDSL transmitter comprising; a receiver that receives the bit rate values; logic that identifies a particular one of the candidate cyclic prefix lengths having the largest bit rate value of the computed bit rate values. - View Dependent Claims (13, 14)
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Specification