Semiconductor device with recess portion over pad electrode

• US 7,919,875 B2
• Filed: 12/13/2007
• Issued: 04/05/2011
• Est. Priority Date: 08/06/2003
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Kanto Sanyo Semiconductors Company Limited (Panasonic Holdings Corporation), Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Noma, Takashi, Kitagawa, Katsuhiko, Otsuka, Hisao, Seki, Yoshinori, Yamaguchi, Keiichi, Takao, Yukihiro, Wakui, Motoaki, Iida, Masanori, Suzuki, Akira
• Primary Examiner(s): Landau; Matthew C
• Assistant Examiner(s): Nicely; Joseph C
• Application Number:
  US11/956,160
• Publication Number:
  US 20080093708A1
• Time in Patent Office: 1,209 Days
• Field of Search: 438/406, 438/620, 438/110, 438113-114, 438458-465, 438/401, 257780-784, 257/E21.122, 257/E23.021, 257/E23.011, 257/E23.133, 257/E21.502, 257/797, 257/E23.01, 257/E23.179, 257/E21.599, 257620-622, 257/E23.012, 257/E23.02, 257/E23.024, 257/E21.578, 257E21597-E21602, 257/698, 257/701, 257/737, 257/750, 257/773, 257/E23.015
• US Class Current: 257/783
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/68372 used to support a device or wafer when forming electrical connections thereto when forming bonding pads H01L24/03; when forming bump connectors H01L24/11; when forming layer connectors H01L24/27
• CPC Class Codes: H01L 2224/02313 Subtractive methods
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/0558 being stacked
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/131 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/12 Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 2924/00013 Fully indexed content
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys

Abstract

A manufacturing method of a semiconductor device formed in a chip size package is improved to enhance a yield and reliability. A window to expose first wirings is formed only in a region of a semiconductor substrate where the first wirings exist. As a result, area of the semiconductor substrate bonded to a supporting body through an insulation film and a resin is increased to prevent cracks in the supporting body and separation of the semiconductor substrate from the supporting body. A slit is formed along a dicing line after forming the window, the slit is covered with a protection film and then the semiconductor substrate is diced into individual semiconductor dice. Thus, separation on a cut surface or at an edge of the semiconductor dice, which otherwise would be caused by contact of the blade in the dicing can be prevented.

Claims

1. A semiconductor device comprising:

a semiconductor die having an insulation film formed on a front surface thereof;

a first wiring formed on the insulation film;

a supporting body disposed on the insulation film and the first wiring;

an adhesive layer attaching the supporting body to the front surface of the semiconductor die so as to cover all lateral edges of the first wiring;

a recess portion formed in the semiconductor die and extending from a side of the semiconductor die horizontally with respect to the front surface and extending from a back surface of the semiconductor die vertically with respect to the front surface so as to extend into the supporting body; and

a second wiring disposed in the recess portion so as to be connected to the first wiring; and

a protection film disposed on the second wiring so as to be in contact with a side surface of the supporting body,

wherein, in plan view of the semiconductor device, a length of the recess portion along said side of the semiconductor die is shorter than a length of the semiconductor die along said side of the semiconductor die, and

in plan view of the semiconductor device a part of the first wiring is in the recess portion and not covered by the semiconductor die, and another part of the first wiring is covered by the semiconductor die.

2. The semiconductor device of claim 1, wherein part of the first wiring is disposed between the semiconductor die and the supporting body.

3. The semiconductor device of claim 2, wherein the length of the recess portion along said side of the semiconductor die is shorter than a length of the first wiring along said side of the semiconductor die so that both ends of the first wiring along said side of the semiconductor die are covered by the semiconductor die.

4. The semiconductor device of claim 2, wherein the recess portion extends horizontally so as not to reach a side of the first wiring that is normal to said side of the semiconductor die.