Trench-gate field effect transistor with channel enhancement region and methods of forming the same
First Claim
1. A field effect transistor comprising:
- a body region of a first conductivity type forming a PN junction with a semiconductor region of a second conductivity type;
a gate trench extending through the body region and terminating within the semiconductor region;
a source region of the second conductivity type adjacent the gate trench, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the gate trench sidewall; and
a channel enhancement region of the second conductivity type adjacent the gate trench, the channel enhancement region partially extending into a lower portion of the channel region to thereby reduce a resistance of the channel region.
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Accused Products
Abstract
A field effect transistor includes a body region of a first conductivity type in a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminating within the semiconductor region. A source region of the second conductivity type extends in the body region adjacent the gate trench. The source region and an interface between the body region and the semiconductor region define a channel region therebetween which extends along the gate trench sidewall. A channel enhancement region of the second conductivity type is formed adjacent the gate trench. The channel enhancement region partially extends into a lower portion of the channel region to thereby reduce a resistance of the channel region.
36 Citations
13 Claims
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1. A field effect transistor comprising:
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a body region of a first conductivity type forming a PN junction with a semiconductor region of a second conductivity type; a gate trench extending through the body region and terminating within the semiconductor region; a source region of the second conductivity type adjacent the gate trench, the source region and an interface between the body region and the semiconductor region defining a channel region therebetween, the channel region extending along the gate trench sidewall; and a channel enhancement region of the second conductivity type adjacent the gate trench, the channel enhancement region partially extending into a lower portion of the channel region to thereby reduce a resistance of the channel region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 13)
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8. A shielded gate field effect transistor comprising:
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body regions of a first conductivity type extending in a semiconductor region of a second conductivity type; gate trenches separated by the body regions; at least one conductive shield electrode disposed in each gate trench; a gate electrode disposed in each gate trench over but insulated from the at least one conductive shield electrode; a shield dielectric layer insulating the at least one conductive shield electrode from the semiconductor region; and a gate dielectric layer insulating each gate electrode from adjacent body regions; source regions of the second conductivity type extending in the body region adjacent the gate trenches, each source region and an interface between the corresponding body region and the semiconductor region defining a channel region therebetween, each channel region extending along sidewall of the corresponding gate trench; and a channel enhancement region of the second conductivity type adjacent each gate trench, the channel enhancement region partially extending into a lower portion of the corresponding channel region to thereby reduce a resistance of the channel region. - View Dependent Claims (9, 10, 11, 12)
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Specification