Pulse resistor (brake resistor) for a frequency converter in the higher voltage and capacity range

• US 7,924,585 B2
• Filed: 07/28/2006
• Issued: 04/12/2011
• Est. Priority Date: 08/26/2005
• Status: Active Grant

• Current Assignee: Innomotics GmbH
• Original Assignee: Siemens AG
• Inventors: Sommer, Rainer
• Primary Examiner(s): HAN, YOUNGHUIE JESSICA
• Application Number:
  US12/064,889
• Publication Number:
  US 20080197966A1
• Time in Patent Office: 1,719 Days
• Field of Search: 363/29, 363/70, 363/71, 363/98, 363/99, 363/120, 363/132, 363/151
• US Class Current: 363/99
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 7/4835 comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
• CPC Class Codes: H02P 3/22 by short-circuit or resistive braking
• CPC Class Codes: H03K 17/107 in composite switches
• CPC Class Codes: H03K 17/168 in composite switches

Abstract

The invention relates to a pulse resistor for a frequency converter in the higher voltage and capacity range. The inventive pulse resistor is characterized by comprising at least two bipolar subsystems (24) and a resistor element (14), said subsystems (24) and said resistor element (14) being connected in series. The inventive pulse resistor is devoid of the drawbacks of known pulse resistors, it can be finely controlled by a brake current (iB) and can be adapted to any medium voltage by simple means.

Claims

1. A pulse resistor for a converter operating in a moderately high voltage and power range, comprising:

at least two serially connected two-terminal subsystems, said serially connected subsystems having a first terminal connected to a first busbar and a second terminal; and

a substantially ohmic resistance element electrically connected in series with the serially connected subsystems, with a first terminal of the resistance element connected to a second busbar and a second terminal of the resistance element connected to the second terminal of the serially connected subsystems,

wherein current flow between the first busbar and the second busbar is exclusive through the serially connected subsystems and the resistance element.

2. The pulse resistor of claim 1, wherein the two-terminal subsystem comprises two serially connected turn-off semiconductor switches, a unipolar storage capacitor connected in parallel with the serially connected turn-off semiconductor switches, and two diodes, with each of the two diodes being connected antiparallel with a corresponding one of the turn-off semiconductor switches.

3. The pulse resistor of claim 2, wherein the unipolar storage capacitor has a capacitance value selected such that an amount of energy stored in parasitic inductances of supply lines and of the resistance element is substantially smaller than an amount of energy stored in the unipolar storage capacitor.

4. The pulse resistor of claim 2, wherein the unipolar storage capacitor of the two-terminal subsystem has a capacitance value selected such that a time constant defined by the resistance element and the unipolar storage capacitor is smaller than a duration of a control state.

5. The pulse resistor of claim 2, wherein each subsystem includes two connecting terminals, with one of the two serially connected turn-off semiconductor switches connected to both connecting terminals.

6. The pulse resistor of claim 2, wherein each subsystem includes two connecting terminals, with one the connecting terminals connected to a center tap of the serially connected turn-off semiconductor switches and the other one of the connecting terminals connected to an end tap of the serially connected turn-off semiconductor switches.

7. The pulse resistor of claim 1, wherein the turn-off semiconductor switches are implemented as insulated gate bipolar transistors.

8. The pulse resistor of claim 1, wherein the turn-off semiconductor switches are implemented as MOS field effect transistors.