Low power consumption MIS semiconductor device

• US 7,928,759 B2
• Filed: 05/07/2010
• Issued: 04/19/2011
• Est. Priority Date: 10/25/2002
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Electronics Corporation
• Inventors: Hidaka, Hideto
• Primary Examiner(s): Chang; Daniel D
• Application Number:
  US12/775,976
• Publication Number:
  US 20100219857A1
• Time in Patent Office: 347 Days
• Field of Search: 326/33, 326/34, 326/31, 326/83, 326/112, 326/121, 327/544
• US Class Current: 326/34
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H03K 19/0016 by using a control or a clock signal, e.g. in order to apply power supply

Abstract

A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.

Claims

1. A semiconductor device comprising:

a plurality of blocks each having a plurality logic circuits constructed of an insulated gate field effect transistor having a first gate insulation film and processing a received signal;

a plurality of switching circuits, arranged corresponding to the respective circuit blocks, each including a first switching transistor and a second switching transistor having a second gate insulation film greater in thickness than said first gate insulation film; and

a switch control circuit for setting a switch control signal to a switching circuit arranged for a respective circuit block among said plurality of circuit blocks set into operating state to an active state to turn said first switching transistor and said second switching transistor conductive, wherein

said first switching transistor is rendered selectively conductive to electrically couple a first power source node supplied a first power supply voltage and a first power node of a corresponding logic circuit in response to a corresponding switch control signal wherein

said second switching transistor is rendered selectively conductive to electrically couple a second power source node supplied a second power supply voltage lower than said first power supply voltage and a second power node of a corresponding logic circuit in response to said corresponding switch control signal.

2. The semiconductor device according to claim 1, wherein:

said respective circuit block receives a first power voltage of a first internal power line and a second power voltage of a second internal power line as an operating power supply voltage, for processing a received signal, wherein

said plurality of switching circuits include a plurality of said first switching transistors arranged at both ends and a central position of said first internal power line, and

said plurality of switching circuits include a plurality of said second switching transistors arranged at both ends and a central position of said second internal power line.

3. A semiconductor device comprising:

a logic gate constructed of an insulated gate field effect transistor having a first gate insulation film, receiving a first voltage of a first internal power node and a second voltage lower than said first voltage of a second internal power node as an operating power source voltage to operate, and processing a received signal;

a current drive transistor constructed of an insulated gate field effect transistor having a second gate insulation film greater in thickness than said first gate insulation film, connected between said first internal power node and a first power source node, for causing a current flow between said first power source node and said first internal power node in response to a control signal;

a comparison circuit selectively enabled in response to an operation mode instructing signal instructing a mode of operation of said logic gate, and comparing said voltage of said first internal power node and a reference voltage to generate said control signal based on a result of the comparison; and

a switching transistor constructed of an insulated gate field effect transistor having said second gate insulation film, connected between said second internal power node and a second power source node, and selectively conductive to electrically couple said second power source node and said second internal power node in a common phase with said comparison circuit.

4. The semiconductor device according to claim 3, wherein said current drive transistor and said insulated gate field effect transistor of said logic gate are the same in conductivity type, and said current drive transistor is greater in channel doping amount than said insulated gate field effect transistor of said logic gate.

5. The semiconductor device according to claim 3, wherein said current drive transistor and said insulated gate field effect transistor of said logic gate are identical in conductivity type, and said current drive transistor is larger in channel length than said insulated gate field effect transistor of said logic gate.

6. The semiconductor device according to claim 3, wherein said first gate insulation film is no more than 2.5 nm in thickness and said second gate insulation film is no less than 3 nm in thickness.

7. The semiconductor device according to claim 3, wherein said comparison circuit generates said control signal so as to set said current drive transistor into an off state when disabled.

8. A semiconductor device comprising:

at least one logic circuit constructed of an insulated gate field effect transistor having a first gate insulation film, receiving a first voltage of a first internal power node and a second voltage lower of a second internal power node as an operating power supply voltage to operate, for processing a received signal of a first amplitude, wherein the second voltage is lower than the first voltage;

a first switching transistor connected between said first internal power node and a first power source node, having a gate insulation film greater in thickness than said first gate insulation film, having a threshold voltage no less in absolute value than a threshold voltage of said insulated gate field effect transistor of said at least one logic circuit, for causing a current flow between said first power source node and said first internal power node in response to a switch control signal of an amplitude no less than said first amplitude;

a comparison circuit arranged corresponding to said at least one logic circuit, selectively enabled in response to an operation mode instructing signal instructing a mode of operation of a corresponding logic circuit and comparing the voltage on said internal power node and a reference voltage to generate said switch control signal in accordance with a result of comparison when enabled; and

a second switching transistor constructed of an insulated gate field effect transistor having said second gate insulation film, connected between said second internal power node and a second power source node, and rendered selectively conductive to electrically couple said second power source node and said second internal power node in a common phase with said comparison circuit selectively enabled in response to said operation mode instructing signal.