Configuration context switcher with a latch

• US 7,928,761 B2
• Filed: 09/08/2008
• Issued: 04/19/2011
• Est. Priority Date: 09/06/2007
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Voogel, Martin, Redgrave, Jason, Chandler, Trevis
• Primary Examiner(s): Tan, Vibol
• Assistant Examiner(s): WHITE, DYLAN C
• Application Number:
  US12/206,718
• Publication Number:
  US 20090146686A1
• Time in Patent Office: 953 Days
• Field of Search: 326 37- 41, 326/47
• US Class Current: 326/38
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G11C 7/1045 Read-write mode select circuits
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H03K 19/0008 Arrangements for reducing power consumption
• CPC Class Codes: H03K 19/17732 Macroblocks
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources
• CPC Class Codes: H03K 19/17752 for hot reconfiguration
• CPC Class Codes: H03K 19/17768 for security
• CPC Class Codes: H03K 3/0372 of the master-slave type

Abstract

Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.

Claims

1. An integrated circuit (“

IC”

) comprising;

a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit; and

an interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing the configuration data sets, wherein the set of latches are not clocked latches.

2. The IC of claim 1, wherein the set of latches is further for providing the received configuration data sets to the configurable circuit after temporarily storing the configuration data set.

3. The IC of claim 1, wherein the set of latches is further (i) for receiving different configuration data sets from different sets of storage circuits at different instances in time and (ii) for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the configurable circuit.

4. The IC of claim 1, wherein each configuration data set includes only one logical bit.

5. The IC of claim 4, wherein the interconnect circuit supplies each configuration data bit as a single physical bit to the configurable circuit.

6. The IC of claim 1, wherein each configuration data set includes more than one logical bit.

7. The IC of claim 1, wherein the interconnect circuit switchably connects the configurable circuit to different sets of storage circuits to receive different configuration data sets in order to allow the configurable circuit to reconfigure while the IC is operating.

8. The IC of claim 1, wherein each set of storage circuits includes only one storage circuit.

9. The IC of claim 1, wherein each set of storage circuits includes more than one storage circuit.

10. The IC of claim 1, wherein a storage operation of the set of latches is based on the configuration data stored by the set of latches.

11. The IC of claim 10, wherein the set of latches comprises a set of toggle circuits for toggling the storage operation of the set of latches based on the data received by the set of latches.

12. The IC of claim 11, wherein the set of toggle circuits toggle the storage operation of the set of latches on changing edges of the received data.

13. An integrated circuit (“

IC”

) comprising;

a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit; and

an interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing the configuration data sets, wherein the set of latches is further (i) for receiving different configuration data sets from different sets of storage circuits at different instances in time and (ii) for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the configurable circuit,

wherein the set of latches comprises;

a first set of master latches and a second set of slave latches,

said first set of master latches for receiving different configuration data sets from different sets of storage circuits at different instances in time and for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the second set of slave latches,

said second set of slave latches for receiving different configuration data sets from the first set of master latches at different instances in time and for providing each received particular configuration data set to the configurable circuit.

14. An integrated circuit (“

IC”

) comprising;

a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit; and

an interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing the configuration data sets, wherein each configuration data set includes only one logical bit, wherein the interconnect circuit supplies each configuration data bit as two complementary physical bits to the configurable circuit.

15. An electronic device comprising:

an integrated circuit (“

IC”

) comprising;

a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit; and

an interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing the configuration data sets, wherein the set of latches are not clocked latches.

16. The electronic device of claim 15, wherein the set of latches is further for providing the received configuration data sets to the configurable circuit after temporarily storing the configuration data set.

17. The electronic device of claim 15, wherein the set of latches is further (i) for receiving different configuration data sets from different sets of storage circuits at different instances in time and (ii) for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the configurable circuit.

18. The electronic device of claim 15, wherein each configuration data set includes only one logical bit.

19. An electronic device comprising:

an integrated circuit (“

IC”

) comprising;

a configurable circuit for configurably performing one of a plurality of operations based on configuration data

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit; and

an interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing the configuration data sets, wherein the set of latches is further (i) for receiving different configuration data sets from different sets of storage circuits at different instances in time and (ii) for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the configurable circuit, wherein the set of latches comprises;

a first set of master latches and a second set of slave latches,

said first set of master latches for receiving different configuration data sets from different sets of storage circuits at different instances in time and for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the second set of slave latches,

said second set of slave latches for receiving different configuration data sets from the first set of master latches at different instances in time and for providing each received particular configuration data set to the configurable circuit.