System to enable a memory hub device to manage thermal conditions at a memory device level transparent to a memory controller
First Claim
1. A memory system, comprising:
- a memory hub device integrated in a memory module;
a set of memory devices coupled to the memory hub device; and
a first set of thermal sensors integrated in the set of memory devices, wherein the memory hub device comprises;
a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency;
a write data queue that receives memory write data from the external memory controller via the memory channel at the first operating frequency; and
a read data queue that transmits memory read data from the external memory controller via the memory channel at the first operating frequency; and
a memory hub controller integrated in the memory hub device, wherein the memory hub controller;
reads the memory access command from the command queue at a second operating frequency;
reads the memory write data from the write data queue at the second operating frequency; and
writes the read data to the read data queue at the second operating frequency, wherein receiving the memory access command, receiving the write data, and transmitting the read data at the first operating frequency and reading the memory access command, reading the write data, and writing the read data at the second operating frequency implements a fully asynchronous boundary within the memory hub device.
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Abstract
A memory system is provided that manages thermal conditions at a memory device level transparent to a memory controller. The memory systems comprises a memory hub device integrated in a memory module, a set of memory devices coupled to the memory hub device, and a first set of thermal sensors integrated in the set of memory devices. A thermal management control unit integrated in the memory hub device monitors a temperature of the set of memory devices sensed by the first set of thermal sensors. The memory hub device reduces a memory access rate to the set of memory devices in response to a predetermined thermal threshold being exceeded thereby reducing power used by the set of memory devices which in turn decreases the temperature of the set of memory devices.
151 Citations
18 Claims
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1. A memory system, comprising:
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a memory hub device integrated in a memory module; a set of memory devices coupled to the memory hub device; and a first set of thermal sensors integrated in the set of memory devices, wherein the memory hub device comprises; a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency; a write data queue that receives memory write data from the external memory controller via the memory channel at the first operating frequency; and a read data queue that transmits memory read data from the external memory controller via the memory channel at the first operating frequency; and a memory hub controller integrated in the memory hub device, wherein the memory hub controller; reads the memory access command from the command queue at a second operating frequency; reads the memory write data from the write data queue at the second operating frequency; and writes the read data to the read data queue at the second operating frequency, wherein receiving the memory access command, receiving the write data, and transmitting the read data at the first operating frequency and reading the memory access command, reading the write data, and writing the read data at the second operating frequency implements a fully asynchronous boundary within the memory hub device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A data processing system, comprising:
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a processor; and a memory coupled to the processor, wherein the memory comprises one or more memory modules, each memory module comprising; a memory hub device integrated in the memory module; a set of memory devices coupled to the memory hub device; and a first set of thermal sensors integrated in the set of memory devices, wherein the memory hub device comprises; a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency; a write data queue that receives memory write data from the external memory controller via the memory channel at the first operating frequency; and a read data queue that transmits memory read data from the external memory controller via the memory channel at the first operating frequency; and a memory hub controller integrated in the memory hub device, wherein the memory hub controller; reads the memory access command from the command queue at a second operating frequency; reads the memory write data from the write data queue at the second operating frequency; and writes the read data to the read data queue at the second operating frequency, wherein receiving the memory access command, receiving the write data, and transmitting the read data at the first operating frequency and reading the memory access command, reading the write data, and writing the read data at the second operating frequency implements a fully asynchronous boundary within the memory hub device. - View Dependent Claims (13, 14, 15, 16, 17)
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18. A method for managing thermal conditions at a memory device level transparent to a memory controller, comprising:
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monitoring, by a thermal management control unit integrated in a memory hub device of a memory module, a temperature of a set of memory devices sensed by a set of thermal sensors integrated in the set of memory devices, wherein the set of memory devices are coupled to the memory hub device; and reducing, by the memory hub device, a memory access rate to the set of memory devices in response to a predetermined thermal threshold being exceeded thereby reducing power used by the set of memory devices which in turn decreases the temperature of the set of memory devices, wherein the memory hub device comprises; a command queue that receives a memory access command from an external memory controller via a memory channel at a first operating frequency; a write data queue that receives memory write data from the external memory controller via the memory channel at the first operating frequency; and a read data queue that transmits memory read data from the external memory controller via the memory channel at the first operating frequency; and a memory hub controller integrated in the memory hub device, wherein the memory hub controller; reads the memory access command from the command queue at a second operating frequency; reads the memory write data from the write data queue at the second operating frequency; and writes the read data to the read data queue at the second operating frequency, wherein receiving the memory access command, receiving the write data, and transmitting the read data at the first operating frequency and reading the memory access command, reading the write data, and writing the read data at the second operating frequency implements a fully asynchronous boundary within the memory hub device.
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Specification