Automation device
First Claim
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1. An automation device, with which a multiplicity of physically distributed functional units communicate with each other by means of a common transmission protocol, the automation device comprising:
- a microcontroller, which is assigned at least one clock generator and one memory unit, and which is connected at least to one data source, which is designed to output a data bit-stream to be transmitted, wherein a first table includes a sequential sequence of equidistant samples having a first frequency and a second table includes a sequential sequence of equidistant samples at a second frequency, said first and said second tables being stored in the memory unit (150), such that said first table or said second table can be called up, in such a manner that, depending on the data bit-stream, the samples can be alternately output from the first table (151) to output a logic one or from the second table (152) to output a logic zero, using the same said at least one clock generator; and
wherein each table (151, 152) is divided into n areas, the respective first samples each being phase-shifted through 2*π
/n.
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Abstract
The invention relates to an automation device, with which a multiplicity of physically distributed functional units communicate with each other by means of a common transmission protocol. The device has a microcontroller (110), which is assigned at least one clock generator (120) and one memory unit (150), and which is connected at least to one data source (140), which is designed to output a data bit-stream to be transmitted.
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4 Claims
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1. An automation device, with which a multiplicity of physically distributed functional units communicate with each other by means of a common transmission protocol, the automation device comprising:
- a microcontroller, which is assigned at least one clock generator and one memory unit, and which is connected at least to one data source, which is designed to output a data bit-stream to be transmitted, wherein a first table includes a sequential sequence of equidistant samples having a first frequency and a second table includes a sequential sequence of equidistant samples at a second frequency, said first and said second tables being stored in the memory unit (150), such that said first table or said second table can be called up, in such a manner that, depending on the data bit-stream, the samples can be alternately output from the first table (151) to output a logic one or from the second table (152) to output a logic zero, using the same said at least one clock generator; and
wherein each table (151, 152) is divided into n areas, the respective first samples each being phase-shifted through 2*π
/n. - View Dependent Claims (2, 3, 4)
- a microcontroller, which is assigned at least one clock generator and one memory unit, and which is connected at least to one data source, which is designed to output a data bit-stream to be transmitted, wherein a first table includes a sequential sequence of equidistant samples having a first frequency and a second table includes a sequential sequence of equidistant samples at a second frequency, said first and said second tables being stored in the memory unit (150), such that said first table or said second table can be called up, in such a manner that, depending on the data bit-stream, the samples can be alternately output from the first table (151) to output a logic one or from the second table (152) to output a logic zero, using the same said at least one clock generator; and
Specification