Configurable IC with interconnect circuits that have select lines driven by user signals

• US 7,932,742 B2
• Filed: 11/19/2007
• Issued: 04/26/2011
• Est. Priority Date: 03/15/2005
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Hutchings, Brad, Schmit, Herman, Teig, Steven
• Primary Examiner(s): Tan, Vibol
• Application Number:
  US11/942,691
• Publication Number:
  US 20080129335A1
• Time in Patent Office: 1,254 Days
• Field of Search: 326/38, 326/40, 326/41
• US Class Current: 326/38
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H03K 19/17736 Structural details of routing resources

Abstract

Some embodiments of the invention provide a configurable integrated circuit (“IC”). The IC includes a first set of circuits and a second set of circuits interspersed among the first set of circuits. Each set of circuits includes at least ten volatile configurable circuits. Several circuits in at least one of the sets are user multiplexers. Each particular user multiplexer has input and output terminals and has a set of select terminals for receiving a set of user-design signals that directs the particular multiplexer to connect a set of the input terminals to a set of the output terminals. The user-design signals are signals generated internally by the IC.

Claims

1. An integrated circuit (IC) comprising:

a particular arrangement of circuits for configurably performing a set of logic functions, the particular arrangement of circuits comprising;

a set of configurable logic circuits for performing set of logic functions as determined by configuration data;

a set of configurable interconnect circuits for configurably routing signals between the particular arrangement of circuits; and

a set of user interconnect circuits each for performing a logic function based on user signals, wherein each user interconnect circuit comprises an input terminal set for receiving a first set of user signals from configurable logic circuits, a select terminal set for receiving a second set of user signals from configurable logic circuits, and an output terminal set for outputting a subset of the first set of user signals based on the received second set of user signals, wherein at least one select terminal of at least one user interconnect circuit'"'"'s select terminal set couples to a configurable interconnect circuit that configurably connects the select terminal to an output terminal of a configurable logic circuit.

2. The IC of claim 1, wherein said configurable logic circuit is a lookup table (LUT).

3. The IC of claim 1, wherein each interconnect circuit of the set of user interconnect circuits is for performing a plurality of logic functions.

4. The IC of claim 3, wherein each interconnect circuit of the set of user interconnect circuits is for performing a plurality of Boolean operations.

5. The IC of claim 1, wherein the user signals are internally generated during runtime of the IC.

6. The IC of claim 1, wherein the user interconnect circuits are in a particular repeated pattern within the IC.

7. The IC of claim 1, wherein the particular arrangement of circuits comprises an interspersing of the user interconnect circuits amongst repeated patterns of circuits throughout the IC.

8. The IC of claim 7, wherein the particular arrangement of circuits comprises at least fifty user interconnect circuits.

9. The IC of claim 1 further comprising a set of non-configurable logic circuits for performing a static set of logic functions.

10. An integrated circuit (IC) comprising:

a plurality of logic circuits for performing a set of logic functions, each particular logic circuit comprising;

a plurality of user interconnect circuits, each user interconnect circuit comprising a first set of input terminals for receiving a first set of user-design signals, a first set of output terminals, and a first set of select terminals for receiving a second set of user-design signals that direct the user interconnect circuit to pass data from a subset of the first set of input terminals to the first set of output terminals; and

a configurable interconnect circuit comprising a second set of input terminals that receive data from said first set of output terminals of each of said plurality of user interconnect circuits, a second set of output terminals, and a second set of select terminals for receiving a set of configuration data that directs the configurable interconnect circuit to pass data from a subset of the second set of input terminals to the second set of output terminals;

wherein said data that is output from the configurable interconnect circuit is an output for the particular logic circuit.

11. The IC of claim 10, wherein the first and second sets of user-design signals received by a particular user interconnect circuit determine which logic function from the set of logic functions the particular user interconnect circuit performs.

12. The IC of claim 10, wherein a plurality of circuits of the IC is distributed within a particular repeated pattern and said plurality of logic circuits is interspersed within the plurality of circuits.

13. The IC of claim 10, wherein user-design signals comprise signals generated by configurable logic circuits of the IC during runtime of the IC.

14. A method of selectively outputting data in an integrated circuit (IC) comprising a plurality of user interconnect circuits, a plurality of configurable interconnect circuits, and a plurality of configurable logic circuits, the method comprising:

at a particular user interconnect circuit;

receiving at an input terminal set a first set of user-design signals from configurable logic circuits;

receiving at a select terminal set a second set of user-design signals from configurable logic circuits; and

based on the received second set of user-design signals, outputting to a particular configurable interconnect circuit a subset of the first set of user-design signals,

wherein the particular configurable interconnect circuit, based on a set of configuration data, configurably connects an output terminal set of the particular user interconnect circuit to an input terminal set of a circuit.

15. The method of claim 14, wherein the receiving at the input terminal set further comprises receiving the first set of user-design signals through at least one configurable interconnect circuit.

16. The method of claim 14, wherein the receiving at the select terminal set further comprises receiving the second set of user-design signals through at least one configurable interconnect circuit.

17. The method of claim 14, wherein each user-design signal is internally generated during runtime of the IC.

18. An integrated circuit (IC) comprising:

a particular arrangement of circuits for configurably performing a set of logic functions, the particular arrangement of circuits comprising;

a set of configurable logic circuits for performing the set of logic functions as determined by configuration data;

a set of configurable interconnect circuits for configurably routing signals between circuits; and

a set of user interconnect circuits, each user interconnect circuit comprising an input terminal set for receiving a first set of user signals from configurable logic circuits, a select terminal set for receiving a second set of user signals from configurable logic circuits, and an output terminal set for outputting a subset of the first set of user signals based on the received second set of user signals, wherein at least one output terminal of at least one user interconnect circuit'"'"'s output terminal set couples to a configurable interconnect circuit that configurably connects the output terminal to an input terminal set of a circuit.

19. The IC of claim 18, wherein a particular user interconnect circuit receives the first set of user signals through at least one configurable interconnect circuit.

20. The IC of claim 18, wherein a particular user interconnect circuit receives the second set of user signals through at least one configurable interconnect circuit.

21. The IC of claim 18, wherein the particular arrangement of circuits comprises an interspersing of user interconnect circuits amongst repeated patterns of circuits throughout the IC.