×

GPS RF front end IC with frequency plan for improved integrability

  • US 7,933,627 B2
  • Filed: 03/06/2006
  • Issued: 04/26/2011
  • Est. Priority Date: 12/01/2000
  • Status: Active Grant
First Claim
Patent Images

1. A GPS RF front end integrated circuit comprising:

  • an RF input for receiving a GPS RF signal;

    a mixer in a path of the RF signal for receiving the GPS RF signal and a local oscillator (LO) signal for downconverting the GPS RF signal to an intermediate frequency (IF) signal;

    an IF filter in the path of the GPS RF signal for receiving the IF signal, wherein the IF filter is a bandpass filter with a predefined center frequency;

    a frequency synthesizer for generating the LO signal; and

    a divider circuit to synthesize a GPS processing clock signal from the LO signal, wherein a frequency of the LO signal is an nth harmonic of the GPS processing clock signal, and a frequency of the GPS processing clock signal is at least twelve times higher than the predefined center frequency of the IF filter,wherein leakage of the nth harmonic of the GPS processing clock signal into the path of the GPS RF signal is downconverted and rejected by the IF filter, and wherein a data acquisition clock signal for sampling the received GPS RF signal is obtained by frequency-dividing the GPS processing clock signal.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×