Semiconductor light emitting device and method of manufacturing the same

• US 7,935,554 B2
• Filed: 03/19/2009
• Issued: 05/03/2011
• Est. Priority Date: 12/08/2004
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung LED Co., Ltd. (Samsung Electronics Co. Ltd.)
• Inventors: Yoon, Suk-ho, Sung, Youn-joon, Paek, Ho-sun, Kim, Hyun-soo, Lee, Jeong-wook, Kim, Joo-sung
• Primary Examiner(s): Ngo; Ngan
• Assistant Examiner(s): LIU, BENJAMIN T
• Application Number:
  US12/407,361
• Publication Number:
  US 20090181484A1
• Time in Patent Office: 775 Days
• Field of Search: 438/42, 438/22, 438/44, 438/689, 257/E21.22, 257/E21.219
• US Class Current: 438/42
• CPC Class Codes: H01L 21/0237 Materials
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02458 Nitrides
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02494 Structure
• CPC Class Codes: H01L 21/02502 consisting of two layers
• CPC Class Codes: H01L 21/02513 Microstructure
• CPC Class Codes: H01L 21/0254 Nitrides
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

Provided are a semiconductor light emitting device having a nano pattern and a method of manufacturing the semiconductor light emitting device. The semiconductor light emitting device includes: a semiconductor layer comprising a plurality of nano patterns, wherein the plurality of nano patterns are formed inside the semiconductor layer; and an active layer formed on the semiconductor layer. The optical output efficiency is increased and inner defects of the semiconductor light emitting device are reduced.

Claims

1. A method of manufacturing a semiconductor light emitting device having a nano pattern, the method comprising:

(a) forming a first semiconductor layer on a substrate;

(b) forming etch pits in defect regions of the first semiconductor layer by wet-etching an upper surface of the first semiconductor;

(c) forming a nano pattern by filling the etch pits of the first semiconductor layer with light-transmissive material; and

sequentially forming a second semiconductor layer, an active layer, and a third semiconductor layer on the first semiconductor layer,

wherein step (c) comprises;

coating a light-transmissive material over the first semiconductor layer to fill the etch pits; and

leveling the first semiconductor layer such that a surface of the first semiconductor layer is exposed and the exposed surface of the first semiconductor layer is coplanar with the filled light transmissive material.

2. The method of claim 1, wherein (b) comprises etching using H₃PO₄ or KOH.

3. The method of claim 1, wherein the light-transmissive material is a transparent insulator and is formed of at least one selected from the group consisting of SiO₂, SiN_x, Al₂O₃, HfO, TiO₂, and ZrO.

4. The method of claim 1, wherein the light-transmissive material is a transparent conductor and is formed of ZnO or of an In oxide containing at least one additive selected from the group consisting of Mg, Ag, Zn, Sc, Hf, Zr, Te, Se, Ta, W, Nb, Cu, Si, Ni, Co, Mo, Cr, Mn, Hg, Pr, and La.

5. The method of claim 1, further comprising heating after the coating with the light-transmissive material.