Computing system having a multiple graphics processing pipeline (GPPL) architecture supported on multiple external graphics cards connected to an integrated graphics device (IGD) embodied within a bridge circuit

• US 7,940,274 B2
• Filed: 09/25/2007
• Issued: 05/10/2011
• Est. Priority Date: 11/19/2003
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: Lucid Information Technology, Ltd.
• Inventors: Bakalash, Reuven, Leviathan, Yaniv
• Primary Examiner(s): Wu, Xiao M
• Assistant Examiner(s): Ma, Tize
• Application Number:
  US11/904,040
• Publication Number:
  US 20080084420A1
• Time in Patent Office: 1,323 Days
• Field of Search: None
• US Class Current: 345/505
• CPC Class Codes: G06F 2209/501 Performance criteria
• CPC Class Codes: G06F 9/5044 considering hardware capabilities
• CPC Class Codes: G06T 1/20 Processor architectures; Processor configuration, e.g. pipelining
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 2210/52 Parallel processing

Abstract

A computing system capable of parallelizing the operation of multiple graphics processing units (GPUs) supported on an integrated graphic device (IGD) embodied within a bridge circuit, and employing a multi-mode parallel graphics rendering subsystem having software and hardware implemented components. The computing system includes (i) CPU memory space for storing one or more graphics-based applications, (ii) one or more CPUs for executing the graphics-based applications, (iii) an external graphics card supporting at least one GPU and being connected to the bridge circuit by way of a data communication interface, (iv) a multi-mode parallel graphics rendering subsystem supporting multiple modes of parallel operation, (v) a plurality of graphic processing pipelines (GPPLs), implemented using the GPUs, and (vi) an automatic mode control module. During the run-time of the graphics-based application, the automatic mode control module automatically controls the mode of parallel operation of the multi-mode parallel graphics rendering subsystem so that the multiple GPUs on the external graphics cards are driven in a parallelized manner, or the single GPU in the IGD is controlled during display operations, as the case may be.

Claims

1. A computing system capable of parallelizing the operation multiple graphics processing units (GPUs) supported on multiple external graphics cards, or controlling a single GPU within an integrated graphics device (IGD) embodied within a bridge circuit, said computing system comprising:

CPU memory space for storing one or more graphics-based applications and a graphics library for generating graphics commands and data (GCAD) during the execution of said one or more graphics-based applications;

one or more CPUs for executing said one or more graphics-based applications;

a bridge circuit operably connected to said one or more CPUs and said CPU memory space;

one or more external graphics cards supporting multiple external GPUs;

an integrated graphics device (IGD) embodied within said bridge circuit, and supporting a single GPU;

an integrated graphics device (IGD) embodied within said bridge circuit, supporting a single GPU in said IGD and operably connected to said CPU memory space and said one or more CPUs by way of a memory interface, and having an interconnect for operably connecting said GPUs and said CPU memory space and said one or more CPUs by way of said memory interface;

a multi-mode parallel graphics rendering subsystem supporting multiple modes of parallel operation selected from the group consisting of object division, image division, and time division, and wherein each mode of parallel operation includes at least three stages, namely, decomposition, distribution and recomposition;

wherein said multi-mode parallel graphics rendering subsystem further includes;

(i) a decomposition module for supporting the decomposition stage of parallel operation;

(ii) a distribution module for supporting the distribution stage of parallel operation; and

(iii) a recomposition module for supporting the recomposition stage of parallel operation;

a plurality of graphic processing pipelines (GPPLs), implemented using said GPUs, and supporting a parallel graphics rendering process that employs one or more of said multiple modes of parallel operation in order to execute graphic commands, process graphics data, and render pixel-composited images containing graphics for display on a display device during the run-time of said one or more graphics-based applications, and said display device being connectable to at least one of said one or more external graphics cards and/or said single GPU in said IGD; and

an automatic mode control module for automatically controlling the switching into, out of, and transitioning between said multiple modes of parallel operation during the run-time of said one or more graphics-based applications so that said GPUs are driven in a parallelized manner during the run-time of said one or more graphics-based applications;

wherein said decomposition module divides up said stream of graphic commands and data (GCAD) according to the mode of parallel operation controlled by said automatic mode controller;

wherein said distribution module distributes said stream of graphics commands and data to one or more of said GPUs according to the mode of parallel operation controlled by said automatic mode controller;

wherein one or more of said GPUs execute said graphics commands using said graphics data, and generate partial pixel data sets associated with frames of images of a 3D scene to be composited, according to the mode of parallel operation controlled by said automatic mode controller; and

wherein said recomposition module merges together the partial pixel data sets produced from one or more of said GPUs, according to said mode of parallel operation and controlled by said automatic mode controller, and producing a final pixel data set for display on said display device.

2. The computing system of claim 1, wherein said automatic mode control module employs said real-time profiling of scenes in said one or more graphics-based applications involves (i) collecting and analyzing performance data associated with said multi-mode parallel graphics rendering subsystem and said computing system, during application run-time, (ii) constructing scene profiles for the image frames associated with particular scenes in said one or more graphics-based applications, and (iii) maintaining said scene profiles in an application/scene profile database that is accessible to said automatic mode control module during run-time, so that during the run-time of said one or more graphics-based applications, said automatic mode control module can access and use said scene profiles maintained in said application/scene profile database and determine how to dynamically control the modes of parallel operation of said multi-mode parallel graphics rendering subsystem to optimize system performance.

3. The computing system of claim 1, wherein said automatic mode control module employs real-time detection of scene profile indices programmed within pre-profiled scenes of said one or more graphics-based applications;

wherein said pre-profiled scenes are analyzed prior to run-time, and indexed with said scene profile indices; and

wherein mode control parameters (MCPs) corresponding to said scene profile indices, are stored within an application/scene profile database accessible to said automatic mode control module during application run-time so that during the run-time of said one or more graphics-based applications, said automatic mode control module can access and use said MCPs maintained in said application/scene profile database and determine how to dynamically control the modes of parallel operation of said multi-mode parallel graphics rendering subsystem to optimize system performance.

4. The computing system of claim 1, wherein said automatic mode control module employs a user interaction detection (UID) mechanism for real-time detection of the user'"'"'s interaction with said computing system, and said automatic mode control module uses the detected user interaction to determine how to dynamically control the modes of parallel operation of multi-mode parallel graphics rendering subsystem to optimize system performance, at any instance in time during the run-time of said one or more graphics-based applications.

5. The computing system of claim 1, wherein said bridge circuit is a North memory bridge circuit disposed between said CPU memory space and said one or more CPUs.

6. The computing system of claim 1, wherein said bridge circuit is a South bridge circuit connected to a North memory bridge circuit arranged between said CPU memory space and said one or more CPUs.

7. The computing system of claim 1, wherein said display device is a device selected from the group consisting of an flat-type display panel, a projection-type display panel, and other image display devices.

8. The computing system of claim 1, wherein said computing system is a machine selected from the group consisting of a PC-level computer, information server, laptop, game console system, portable computing system, and any computational-based machine supporting the real-time generation and display of 3D graphics.

9. The computing system of claim 1, wherein said decomposition module comprises first and second decomposition submodules, and wherein said automatic mode control module and said first decomposition submodule are each implemented as a software package in said CPU memory space;

and wherein said second decomposition submodule, said distribution module and said recomposition module are each implemented within said IGD, and are in operable communication with said automatic mode control module in said CPU memory space by way of said interconnect and said memory interface.

10. The computing system of claim 9, wherein said each said software package is implemented in said CPU memory space.

11. The computing system of claim 1, wherein said decomposition module comprises first and second decomposition submodules, and wherein said automatic mode control module and said first decomposition submodule are each implemented as a software package in said CPU memory space;

wherein said second decomposition submodule and said distribution module are each implemented within said IGD, and are in operable communication with said automatic mode control module in said CPU memory space by way of said interconnect and said memory interface; and

wherein said recomposition module is implemented across two or more of said GPUs.

12. The computing system of claim 11, wherein said each said software package is implemented in said CPU memory space.

13. The computing system of claim 1, wherein only one of said GPUs is designated as the primary GPU and is responsible for driving said display unit with a final pixel image composited within a frame buffer (FB) maintained by said primary GPU, and all other GPUs function as secondary GPUs, supporting the pixel image recompositing process.