Robust technique for frame synchronization in DAB-IP systems

• US 7,940,759 B2
• Filed: 06/22/2007
• Issued: 05/10/2011
• Est. Priority Date: 06/22/2007
• Status: Expired due to Fees

• Current Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Original Assignee: Newport Media Inc. (Nexstar Media Group, Inc.)
• Inventors: Ahmed, Elsayed, Yousef, Nabil
• Primary Examiner(s): Ryman; Daniel J
• Assistant Examiner(s): ROBERTS, BRIAN S
• Application Number:
  US11/766,816
• Publication Number:
  US 20080317022A1
• Time in Patent Office: 1,418 Days
• Field of Search: None
• US Class Current: 370/389
• CPC Class Codes: H04H 40/18 Arrangements characterised by circuits or components specially adapted for receiving
• CPC Class Codes: H04H 60/11 Arrangements for counter-measures when a portion of broadcast information is unavailable
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0079 Formats for control data H04L1/16 takes precedence; training sequences H04L25/00 and H04L27/00
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers
• CPC Class Codes: H04L 7/048 using the properties of error detecting or error correcting codes, e.g. parity as synchronisation signal

Abstract

FEC frame synchronization in a DAB-IP system comprising FEC frames includes receiving FEC packets each comprising a FEC packet header and a FEC data field comprising padding bytes at an end of a last FEC packet received; comparing a received FEC packet header with a known FEC packet header until a number of bit errors in the received FEC packet header is less than or equal to a predetermined amount; and matching the received FEC packet header and the padding bytes until at least one of the following actions occur thereby resulting in receiver locking: a number of successive FEC packet headers mismatches in the received FEC packet header; a predetermined number of FEC packets end without padding matching; and FEC packet header and padding matching occurs. The received FEC packets are tracked after receiver locking has occurred to ensure FEC parity packets are positioned properly in the FEC frames.

Claims

1. A method of performing Forward Error Correction (FEC) frame synchronization in a Digital Audio Broadcasting-Internet Protocol (DAB-IP) system comprising FEC frames, said method comprising:

receiving a plurality of FEC packets, wherein each FEC packet comprises a FEC packet header and a FEC data field, and wherein said FEC data field comprises padding bytes in at least one of said plurality of FEC packets;

comparing FEC packet headers of successively received FEC packets to known FEC packet headers until a number of FEC packet headers of successively received FEC packets are comparable to said known FEC packet headers, wherein a successively received FEC packet is comparable to known FEC packet header when a number of bit errors in a comparison of said successively received FEC packet and said known FEC packet header is less than a predetermined amount;

comparing said received FEC packet header to said known FEC packet headers and said received padding bytes with known padding bytes, wherein said comparing comprises storing a number of successive FEC packet header mismatches and storing a number of FEC packets ends without padding matching, and wherein said comparing continues until at least one of the following actions occur;

a predetermined number of successive FEC packet headers mismatches in said received FEC packet header has been found;

a predetermined number of FEC packets end without padding matching has been found; and

FEC packet header and padding matching occurs;

tracking said successively received FEC packets after FEC packet header and padding matching has occurred to ensure FEC packets are positioned properly in said FEC frames.

2. The method of claim 1, further comprising performing FEC decoding upon completion of receiver locking using a Reed Solomon (RS) decoder.

3. The method of claim 2, wherein the tracking comprises monitoring failure flags of said RS decoder.

4. The method of claim 3, further comprising repeating the receiving through tracking when a predetermined number of successive RS decoder failure flags are detected.

5. The method of claim 4, further comprising initiating a false alarm when said predetermined number of successive RS decoder failure flags are detected thereby indicating that a receiver is locked at an incorrect position.

6. The method of claim 1, further comprising using a three state Finite State Machine (FSM) to perform the comparing through tracking.

7. The method of claim 1, wherein the predetermined number of FEC packets end without padding matching equals 9 minus a number of successive FEC packet headers matching to start searching for padding.

8. A program storage device readable by computer storing a program of instructions executable by said computer to perform a method of performing Forward Error Correction (FEC) frame synchronization in a Digital Audio Broadcasting-Internet Protocol (DAB-IP) system comprising FEC frames, said method comprising:

receiving a plurality of FEC packets, wherein each FEC packet comprises a FEC packet header and a FEC data field, and wherein said FEC data field comprises padding bytes in at least one of said plurality of FEC packets;

comparing FEC packet headers of successively received FEC packets to known FEC packet headers until a number of FEC packet headers of successively received FEC packets are comparable to said known FEC packet headers, wherein a successively received FEC packet is comparable to a known FEC packet header when a number of bit errors in a comparison of said successively received FEC packet and said known FEC packet header is less than a predetermined amount;

comparing said received FEC packet header to said known FEC packet headers and said received padding bytes with known padding bytes, wherein said comparing comprises storing a number of successive FEC packet headers mismatches and storing a number of FEC packets end without padding matching, and wherein said comparing continues until at least one of the following actions occur;

a predetermined number of successive FEC packet headers mismatches in said received FEC packet header has been found;

a predetermined number of FEC packets end without padding matching has been found; and

FEC packet header and padding matching occurs;

tracking said successively received FEC packets after FEC packet header and padding matching has occurred to ensure FEC packets are positioned properly in said FEC frames.

9. The program storage device of claim 8, wherein said method further comprises performing FEC decoding upon completion of receiver locking using a Reed Solomon (RS) decoder.

10. The program storage device of claim 9, wherein in said method, the tracking comprises monitoring failure flags of said RS decoder.

11. The program storage device of claim 10, wherein said method further comprises repeating the receiving through tracking when a predetermined number of successive RS decoder failure flags are detected.

12. The program storage device of claim 11, wherein said method further comprises initiating a false alarm when said predetermined number of successive RS decoder failure flags are detected thereby indicating that a receiver is locked at an incorrect position.

13. The program storage device of claim 8, wherein said method further comprises using a three state Finite State Machine (FSM) to perform the comparing through tracking.

14. The program storage device of claim 8, wherein the predetermined number of FEC packets end without padding matching equals 9 minus a number of successive FEC packet headers matching to start searching for padding.

15. An electronic system for performing Forward Error Correction (FEC) frame synchronization in a Digital Audio Broadcasting-Internet Protocol (DAB-IP) system comprising FEC frames, said electronic system comprising:

a receiver adapted to receive a plurality of FEC packets, wherein each FEC packet comprises a FEC packet header and a FEC data field, and wherein said FEC data field comprises padding bytes in at least one of said plurality of FEC packets; and

a hardware-configured three state Finite State Machine (FSM) operatively connected to said receiver, wherein said three state FSM is adapted to perform;

comparing FEC packet headers of successively received FEC packets to known FEC packet headers until a number of FEC packet headers of successively received FEC packets are comparable to said known FEC packet headers, wherein a successively received FEC packet is comparable to a known FEC packet when a number of bit errors in a comparison of said successively received FEC packet and said known FEC packet header is less than a predetermined amount;

comparing said received FEC packet header to said known FEC packet headers and said padding bytes with known padding bytes, wherein said comparing comprises storing a number of successive FEC packet headers mismatches and storing a number of FEC packets end without padding matching, and wherein said comparing continues until at least one of the following actions occur;

a predetermined number of successive FEC packet headers mismatches in said received FEC packet header has been found;

a predetermined number of FEC packets end without padding matching has been found; and

FEC packet header and padding matching occurs;

tracking said successively received FEC packets after FEC packet header and padding matching has occurred to ensure FEC packets are positioned properly in said FEC frames.

16. The electronic system of claim 15, further comprising a Reed Solomon (RS) decoder adapted to perform FEC decoding upon completion of receiver locking.

17. The electronic system of claim 16, wherein said RS decoder comprises failure flags adapted to allow said three state FSM to track the received FEC packets.

18. The electronic system of claim 17, wherein when a predetermined number of successive RS decoder failure flags are detected, said three state FSM is adapted to repeat the receiving through tracking.

19. The electronic system of claim 18, further comprising a false alarm indicator adapted to issue a false alarm when said predetermined number of successive RS decoder failure flags are detected thereby indicating that a receiver is locked at an incorrect position.

20. The electronic system of claim 15, wherein the predetermined number of FEC packets end without padding matching equals 9 minus a number of successive FEC packet headers matching to start searching for padding.