RF circuit with control unit to reduce signal power under appropriate conditions

• US 7,941,110 B2
• Filed: 08/31/2007
• Issued: 05/10/2011
• Est. Priority Date: 07/23/2007
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Gonzalez, David M.
• Primary Examiner(s): Urban; Edward
• Assistant Examiner(s): Hannon; Christian A
• Application Number:
  US11/849,124
• Publication Number:
  US 20090029659A1
• Time in Patent Office: 1,348 Days
• Field of Search: 455/127.1, 455/127.5, 455/129, 455/126, 455/343.1, 455/343.2, 455/343.3, 455/343.4, 455/343.5
• US Class Current: 455/127.5
• CPC Class Codes: H04B 1/04 Circuits
• CPC Class Codes: H04B 1/1607 Supply circuits converters H02M; filters therefor H02M1/14; voltage stabilisers G05F1/46

Abstract

A disclosed RF circuit includes a power amplifier that produces an RF output signal, a detector to generate a detector signal indicative of a power of the RF output signal, and an offset unit to produce an offset signal that indicates low supply voltage conditions. The power of the RF output signal is reduced, at least in part, by a control signal reflecting a combination of the detector signal and the offset signal. The circuit may include a transmitter to provide an RF input signal to the power amplifier. The transmitter may receive the control signal and adjust a power of the RF input signal based on the control signal. The detector may produce a control current indicative of the RF output signal power. The offset unit produces the offset signal based on a difference between the supply voltage and a nominal supply voltage value.

Claims

1. An RF circuit driven by a supply voltage, comprising:

a power amplifier operable to receive an RF input signal and to produce an RF output signal;

a detector operable to generate a detector signal having a current indicative of a power of the RF output signal; and

an offset unit operable to generate an offset signal having a current indicative of a low supply voltage condition in which the supply voltage is below a specified threshold;

wherein the power of the RF output signal is controlled at least in part by a control signal indicative of a control signal current, wherein the control signal current is equal to a sum of the detector signal current and the offset signal current.

2. The RF circuit of claim 1, wherein the RF circuit adjusts the control signal to cause a reduction in the power of the RF output signal in response to the offset signal indicating the low supply voltage condition.

3. The RF circuit of claim 2, wherein a magnitude of the offset signal is indicative of a magnitude of a difference between the specified threshold and the supply voltage.

4. The RF circuit of claim 1, further comprising a transmitter operable to generate said RF input signal and configured to receive the control signal, wherein the transmitter is configured to cause a reduction in a power of the RF input signal in response to the control signal reflecting the low supply voltage condition.

5. The RF circuit of claim 1 wherein the detector signal varies with the power of the RF output signal and further wherein the offset signal varies with a magnitude of a difference between a nominal voltage and the supply voltage.

6. The RF circuit of claim 5, wherein the detector signal current varies logarithmically with the power of the RF output signal and the offset signal current varies linearly with the magnitude of the difference between the nominal voltage and the supply voltage.

7. The RF circuit of claim 5, wherein said supply voltage is determined by a battery voltage and wherein the offset signal varies with a difference between an actual battery voltage and a nominal battery voltage.

8. The RF circuit of claim 5, wherein the offset unit is operable to cause an increase in the control signal current, in response to detecting the low supply voltage condition.

9. The RF circuit of claim 5, wherein the offset unit is operable to cause an increase in the control signal current to reduce the RF output signal sufficiently to ensure compliance with Alternate Channel Power Ration (ACPR) and Error Vector Magnitude (EVM) requirements of a Global System for Mobile communication (GSM) Enhanced Data rate for GSM Evolution (EDGE) specifications.

10. A transmitter system suitable for use in an RF application, comprising:

a power amplifier operable to receive an RF input signal and produce an RF output signal, said RF output signal characterized by an RF output signal power and wherein the power amplifier is configured to receive a supply voltage based on a battery voltage from a battery;

a control unit operable to produce a control signal; and

a transmitter operable to change the RF output signal power by changing the RF input signal and further operable to control the RF output signal power based on said control signal;

wherein the control signal is indicative of a control signal current provided to a control node of the control unit and wherein the control node sources a current of a detector signal, indicative of a power of the RF output signal, and a current of an offset signal, indicative of the battery voltage.

11. The system of claim 10, wherein the offset signal is indicative of a difference between the battery voltage and a nominal voltage.

12. The system of claim 11, wherein said nominal voltage is approximately 3.5 V and wherein the transmitter is configured to reduce the RF output signal power by more than approximately 3 db/V when the battery voltage drops below the nominal voltage.

13. The system of claim 12, wherein the transmitter is configured to reduce the RF output signal power by less than approximately 4 db/V.

14. The system of claim 11, wherein the control unit includes a detector operable to draw the detector signal current from the control node based on said RF output signal power and an offset unit operable to draw the offset signal current from the control node when said battery voltage is below said nominal voltage.

15. The system of claim 14, wherein the offset signal is proportional to a difference between the battery voltage and the nominal voltage.

16. The system of claim 15, wherein the detector signal current and the offset signal current are provided to the control node through a feedback resistor of an operational amplifier to produce the control signal.

17. An RF circuit, comprising:

a power amplifier operable to receive a supply voltage produced by a battery and further operable to produce an RF output signal; and

a control unit operable to produce a control signal indicative of a control signal current that includes an offset component indicative of the supply voltage and a power component indicative of the power of the RF output signal wherein the control unit includes a control node that sinks the control signal current and sources the offset component and the power component;

wherein the RF circuit is operable to control the RF output signal power based at least in part on the control signal.

18. The RF circuit of claim 17, wherein the RF circuit is operable to disable the offset component when the RF output signal power is low.

19. The RF circuit of claim 17, wherein the offset component is indicative of nonlinear power amplifier operation when the supply voltage drops below a nominal voltage.

20. The RF circuit of claim 17, further comprising a transmitter operable to provide an RF input signal to the power amplifier, wherein the control signal is provided to the transmitter and the transmitter is operable to adjust a power of the RF input signal based at least in part on the control signal.

21. The RF circuit of claim 17, wherein the offset component is generated by an offset unit and wherein the offset unit is operable to receive the supply voltage and a reference voltage, and wherein the offset unit includes:

a first voltage divider circuit to receive the reference voltage and produce a first base current that is input to a first transistor to generate a first collector current;

a second voltage divider circuit to receive the supply voltage and produce a second base current that is input to a second transistor to generate a second collector current wherein a difference between the first collector current and the second collector current is indicative of a difference between the supply voltage and the reference voltage;

first mirroring circuits to mirror the first collector current in a first MOS transistor;

second mirroring circuits to mirror the second collector current in a second MOS transistor;

wherein the first and second MOS transistors are arranged in series and wherein a third MOS transistor is arranged in parallel with the second MOS transistor, wherein a current through the third MOS transistor is substantially equal to a difference between the first and second collector currents; and

a third mirroring circuit to mirror the third MOS transistor current in a fourth MOS transistor; and

wherein the offset component comprises the current in the fourth MOS transistor when a source/drain terminal of the fourth MOS transistor is connected to the control node.

22. The RF circuit of claim 21, further comprising a biasing resistor connected between emitters of the first and second transistors wherein a current through the biasing resistor current is substantially half of the difference between the first and second collector currents.