Regeneration of a secret quantity from an intergrated circuit identifier

• US 7,941,672 B2
• Filed: 10/10/2002
• Issued: 05/10/2011
• Est. Priority Date: 11/30/2001
• Status: Active Grant

• Current Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Bardouillet, Michel, Plaza, Laurent, Wuidart, Luc
• Primary Examiner(s): Brown; Christopher J
• Application Number:
  US10/268,459
• Publication Number:
  US 20030102493A1
• Time in Patent Office: 3,134 Days
• Field of Search: 713/184, 713/189, 380/265, 380/45, 380/277, 726/9, 726/20, 726/2
• US Class Current: 713/189
• CPC Class Codes: G06Q 20/341 Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
• CPC Class Codes: G07F 7/082 Features insuring the integrity of the data on or in the card
• CPC Class Codes: G07F 7/1008 Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 23/57 Protection from inspection, reverse engineering or tampering
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H04L 9/0866 involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics

Abstract

A method and a circuit for generating a secret quantity based on an identifier of an integrated circuit, including combining a first digital word derived from a physical parameter network with a second word stored in a non-volatile memory element.

Claims

1. A method for generating a secret quantity based on an identifier of an individual integrated circuit, comprising combining a first digital word derived from a physical parameter network with a second word to form the secret quantity, the secret quantity being a word resulting from the combining, the second word being generated internal to the integrated circuit and stored in a non-volatile memory element of the integrated circuit, the physical parameter network measuring a fixed, single value of an electrical parameter of the integrated circuit, the measured value of the electrical parameter being sensitive to technological and manufacturing process variations of the integrated circuit, the measured value forming an identifier of the individual integrated circuit and being converted to the first digital word, revoking the secret quantity, generating a new second word, and combining the first digital word with the new second word to form a new secret quantity, the new secret quantity being a new word resulting from the combining, the new secret quantity being based on the new second word and on the fixed, single value of the electrical parameter of the integrated circuit, without replacing the integrated circuit to provide the new secret quantity, the new secret quantity being generated, after revoking the secret quantity, under control of a controller located within a secure area of the integrated circuit.

2. The method of claim 1, wherein the second word is randomly generated.

3. The method of claim 1, wherein at least the first word and the secret quantity are stored in elements of the secure area of the integrated circuit.

4. The method of claim 1, wherein the second word is scrambled by means of at least a portion of the first word.

5. A method for modifying a secret quantity of identification of an individual integrated circuit, obtained from a first digital word derived from a physical parameter network and considered as being revoked, comprising combining said first word with a second word to form the secret quantity, the secret quantity being a word resulting from the combining, the second word being generated internal to the integrated circuit and stored in a non-volatile memory element of the integrated circuit, the physical parameter network measuring a fixed, single value of an electrical parameter of the integrated circuit, the measured value of the electrical parameter being sensitive, to technological and manufacturing process variations of the integrated circuit, the measured value forming an identifier of the individual integrated circuit and being converted to the first digital word, revoking the secret quantity, generating a new second word, and combining the first digital word with the new second word to form a new secret quantity, the new secret quantity being a new word resulting from the combining, the new secret quantity being based on the new second word and on the fixed, single value of the electrical parameter of the integrated circuit, without replacing the integrated circuit to provide the new secret quantity, the new secret quantity being generated, after revoking the secret quantity, under control of a controller located within a secure area of the integrated circuit.

6. A circuit for generating a secret quantity internal to an individual integrated circuit, including:

a generator of a first digital word specific to the integrated circuit based on a physical parameter network, the physical parameter network measuring a fixed, single value of an electrical parameter of the integrated circuit, the measured value of the electrical parameter being sensitive to technological and manufacturing process variations of the integrated circuit, the measured value forming an identifier of the individual integrated circuit and being converted to the first digital word;

a generator of a second digital word internal to the integrated circuit;

a non-volatile storage element of the integrated circuit to contain the second digital word;

a combiner of the first and second digital words providing said secret quantity, said secret quantity being a word output by said combiner; and

a controller to control the generator of the second digital word and the combiner for revoking the secret quantity, generating a new second digital word, and combining the first digital word with the new second digital word to form a new secret quantity, the new secret quantity being a new word output by the combiner, the new secret quantity being based on the new second digital word and on the fixed, single value of the electrical parameter of the integrated circuit, without replacing the integrated circuit to provide the new secret quantity, at least the generator of the first digital word, the generator of the second digital word, the combiner and the controller being located within a secure area of the integrated circuit.

7. The circuit of claim 6, further including a scrambler at the input/output of the non-volatile storage element, the scrambler exploiting at least a portion of the first word coming from the physical parameter network.

8. The circuit of claim 6, wherein the generator of the second digital word comprises a random generator.

9. The circuit of claim 6, including means for making ephemeral the respective storages of the first digital word coming from the physical parameter network and of the word forming the secret quantity.

10. A method for generating a secret quantity in an individual integrated circuit, comprising:

generating a first word based on a physical parameter network, the physical parameter network measuring a fixed, single value of an electrical parameter of the integrated circuit, the measured value of the electrical parameter being sensitive to technological and manufacturing process variations of the integrated circuit, the measured value forming an identifier of the individual integrated circuit and being converted to the first word;

randomly generating a second word internal to the integrated circuit and storing the randomly-generated second word in a non-volatile storage element of the integrated circuit;

accessing the second word stored in the non-volatile storage element of the integrated circuit; and

combining the first and second words to form the secret quantity unique to the integrated circuit and based on the physical parameter network, the secret quantity being a word resulting from the combining, revoking the secret quantity, generating a new second word, and combining the first word with the new second word to form a new secret quantity, the new secret quantity being a new word resulting from the combining, the new secret quantity being based on the new second word and on the fixed, single value of the electrical parameter of the integrated circuit, without replacing the integrated circuit to provide the new secret quantity, the new secret quantity being generated, after revoking the secret quantity, under control of a controller located within a secure area of the integrated circuit.

11. A method as defined in claim 10, further comprising storing the first word and the secret quantity in the secure area of the integrated circuit.

12. A method as defined in claim 10, further comprising scrambling the second word by at least a portion of the first word.

13. A method as defined in claim 12, wherein the non-volatile storage element is located outside the secure area of the integrated circuit.

14. A circuit for generating a secret quantity in an individual integrated circuit, comprising:

a generator configured to generate a first word based on a physical parameter network, the physical parameter network measuring a fixed, single value of an electrical parameter of the integrated circuit, the measured value of the electrical parameter being sensitive to technological and manufacturing process variations of the integrated circuit, the measured value forming an identifier of the individual integrated circuit and being converted to the first word;

a random generator internal to the integrated circuit and configured to generate a second word;

a non-volatile storage element of the integrated circuit containing the second word;

a combiner configured to combine the first and second words to provide the secret quantity unique to the integrated circuit and based on the physical parameter network, the secret quantity being a word output by the combiner; and

a controller to control the random generator and the combiner for revoking the secret quantity, generating a new second word, and combining the first word with the new second word to form a new secret quantity, the new secret quantity being a new word output by the combiner, the new secret quantity being based on the new second word and on the fixed, single value of the electrical parameter of the integrated circuit, without replacing the integrated circuit to provide the new secret quantity, at least the generator, the random generator, the combiner and the controller being located within a secure area of the integrated circuit.

15. A circuit as defined in claim 14, further comprising a scrambler configured to scramble the second word by at least a portion of the first word.

16. A circuit as defined in claim 15, wherein the non-volatile storage element is located outside the secure area of the integrated circuit.

17. A method for modifying a secret quantity in an individual integrated circuit, comprising:

generating a first word based on a physical parameter network, the physical parameter network measuring a fixed, single value of an electrical parameter of the integrated circuit, the measured value of the electrical parameter being sensitive to technological and manufacturing process variations of the integrated circuit, the measured value forming an identifier of the individual integrated circuit and being converted to the first word;

generating a second word with a random generator internal to the integrated circuit and storing the randomly-generated second word in a non-volatile storage element of the integrated circuit;

accessing the second word stored in the non-volatile storage element of the integrated circuit;

combining the first and second words to form the secret quantity unique to the integrated circuit and based on the physical parameter network, the secret quantity being a word resulting from the combining; and

revoking the secret quantity, generating a new second word, and combining the first word with the new second word to form a new secret quantity, the new secret quantity being a new word resulting from the combining, the new secret quantity being based on the new second word and on the fixed, single value of the electrical parameter of the integrated circuit, without replacing the integrated circuit to provide the new secret quantity, wherein revoking the secret quantity, generating a new second word, and combining the first word with the new second word to form a new secret quantity are performed under control of a controller located within a secure area of the integrated circuit.

18. A method as defined in claim 17, further comprising scrambling the second word by at least a portion of the first word.