NAND power fail recovery
First Claim
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1. A method to recover the state of data stored in NAND memory after power failure in an electronic device, comprising:
- detecting, during power failure recovery, a page state associated with a NAND page;
determining whether to include the NAND page in an L2P rebuild operation based at least in part on the page state associated with the NAND page; and
updating the L2P table with data from the NAND page, by performing operations comprising;
determining a number of ECC errors or corrections associated with a new page address and the current page address; and
updating the L2P table when the number of ECC errors or corrections associated with the new page address is less than the number of ECC errors or corrections associated with the current page address.
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Abstract
Techniques to recover data from an indirected non-volatile memory system after unexpected power failure, as, e.g., NAND memory in electronic devices are disclosed.
100 Citations
15 Claims
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1. A method to recover the state of data stored in NAND memory after power failure in an electronic device, comprising:
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detecting, during power failure recovery, a page state associated with a NAND page; determining whether to include the NAND page in an L2P rebuild operation based at least in part on the page state associated with the NAND page; and updating the L2P table with data from the NAND page, by performing operations comprising; determining a number of ECC errors or corrections associated with a new page address and the current page address; and updating the L2P table when the number of ECC errors or corrections associated with the new page address is less than the number of ECC errors or corrections associated with the current page address. - View Dependent Claims (2, 3, 4, 5)
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6. A system to recover the state of data stored in NAND memory after power failure in an electronic device, comprising logic circuitry to:
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detect, during power failure recovery, a page state associated with a NAND page; determine whether to include the NAND page in an L2P rebuild operation based at least in part on the page state associated with the page; determine a number of ECC errors or corrections associated with a new page address and the current page address; and update the L2P table with data from the NAND page when the number of ECC errors or corrections associated with the new page address is less than the number of ECC errors or corrections associated with the current page address. - View Dependent Claims (7, 8, 9, 10, 14, 15)
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11. A system to recover the state of data stored in NAND memory after power failure in an electronic device, comprising logic instructions stored on a tangible computer readable medium which, when executed by a processor, configure the processor to:
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detect, during power failure recovery, a page state associated with a NAND page; determine whether to include the NAND page in an L2P rebuild operation based at least in part on the page state associated with the page; determine a number of ECC errors or corrections associated with a new page address and the current page address; and update the L2P table with data from the NAND page when the number of ECC errors or corrections associated with the new page address is less than the number of ECC errors or corrections associated with the current page address. - View Dependent Claims (12, 13)
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Specification