×

Structure and method for forming field effect transistor with low resistance channel region

  • US 7,943,993 B2
  • Filed: 09/27/2010
  • Issued: 05/17/2011
  • Est. Priority Date: 12/13/2007
  • Status: Active Grant
First Claim
Patent Images

1. A trench-gate field effect transistor comprising:

  • trenches extending into a silicon region of a first conductivity type;

    a gate electrode in each trench;

    body regions of a second conductivity type extending over the silicon region between adjacent trenches, each body region forming a PN junction with the silicon region;

    a gate dielectric layer lining at least upper sidewalls of each trench, the gate dielectric layer insulating the gate electrode from the body region;

    source regions of the first conductivity flanking the trenches; and

    a silicon-germanium region vertically extending through each source region and through a corresponding body region, the silicon-germanium region terminating within the corresponding body region before reaching the PN junction.

View all claims
  • 6 Assignments
Timeline View
Assignment View
    ×
    ×