RF detector with crest factor measurement

• US 7,944,196 B2
• Filed: 12/22/2009
• Issued: 05/17/2011
• Est. Priority Date: 05/14/2007
• Status: Active Grant

• Current Assignee: Hittite Microwave, LLC (Analog Devices, Inc.)
• Original Assignee: Hittite Microwave Corporation (Analog Devices, Inc.)
• Inventors: Eken, Yalcin Alper, Katzin, Peter
• Primary Examiner(s): TANG, MINH NHUT
• Application Number:
  US12/645,196
• Publication Number:
  US 20100097143A1
• Time in Patent Office: 511 Days
• Field of Search: None
• US Class Current: 324/76.11
• CPC Class Codes: G01R 21/01 in circuits having distributed constants G01R21/04, G01R21/07, G01R21/09, G01R21/12 take precedence
• CPC Class Codes: H03G 3/3036 in high-frequency amplifiers or in frequency-changers H03G3/3052, H03G3/32, H03G3/34 take precedence

Abstract

An RF detector configured to provide two outputs, one being a function of the true RMS power level of an RF input signal, and the other being a function of the instantaneous/peak power of the RF input signal, normalized to the average power level. The RF detector includes a variable gain detection subsystem including a single detector or detector array that provides a representation of the power level of the RF input signal. The detector or detector array is common to both the RMS power detection channel and the instantaneous/peak power detection channel of the RF detector. A method of RF detection includes providing representations of the RF input signal at different gain levels, selecting one or more of the representations, and averaging the selected signals. The gain levels of the selected representations is adjusted to provide information about the average power level of the RF input signal.

Claims

1. A power detector comprising:

an input configured to receive an input signal;

a variable gain detection subsystem including at least one detector coupled to the input and which detects the input signal and provides a detector output signal;

an integrator coupled to the variable gain detection subsystem and configured to receive the detector output signal and a reference signal and to provide an integrator output signal which is representative of an average power level of the input signal; and

an instantaneous power processing device coupled to the variable gain detection subsystem and configured to receive the detector output signal and to provide at an output of the power detector an instantaneous power output signal which is representative of the instantaneous power level of the input signal normalized to the average power level of the input signal;

wherein the variable gain detection subsystem is configured to receive the integrator output signal and to adjust the detector output signal to a level approximately that of the reference signal.

2. The power detector as claimed in claim 1, wherein the variable gain detection subsystem includes a variable gain amplifier coupled between the input and the at least one detector;

wherein the variable gain amplifier is configured to receive the integrator output signal and to provide an amplified output signal;

wherein the variable gain amplifier is configured so that the gain of the variable gain amplifier is controlled by the integrator output signal; and

wherein the at least one detector is configured to receive the amplified output signal.

3. The power detector as claimed in claim 1, wherein the variable gain detection subsystem further includes:

at least one reference detector not coupled to the input and configured to generate a reference signal; and

means for subtracting the reference signal from the detector output signal;

wherein the reference detector is configured to reduce effects of temperature and fabrication process variations at the output of the detection subsystem.

4. The power detector as claimed in claim 1, wherein the variable gain detection subsystem further includes:

at least one reference detector not coupled to the input and configured to generate a reference signal; and

a summer configured to receive the detector output signal and the reference signal and to output a difference signal based on subtraction of the reference signal from the detector output signal to reduce effects of temperature and fabrication process variations at the output of the detection subsystem.

5. The power detector as claimed in claim 1, where the variable gain detection subsystem further includes means for subtraction of a signal generated by at least one reference detector not coupled to the input;

wherein the reference detector is configured to reduce effects of temperature and fabrication process variations at the output of the detection subsystem.

6. The power detector as claimed in claim 1, wherein the instantaneous power processing device comprises:

a transistor follower configured to receive the detector output signal and to provide the instantaneous power output signal; and

a network coupled to the transistor follower and configured to compensate for temperature variation of the base-emitter voltage of the transistor follower to provide a substantially temperature stable instantaneous power output signal.

7. The power detector as claimed in claim 6, wherein the network comprises a plurality of transistors and at least two resistors including a first resistor and a second resistor;

wherein a base of the transistor follower is coupled to a node between the first resistor and the second resistor.

8. The power detector as claimed in claim 7, wherein the transistors are bipolar transistors.

9. The power detector as claimed in claim 7, wherein the transistors are field effect transistors.

10. The power detector as claimed in claim 6, wherein the instantaneous power processing device further comprises a capacitor coupled to the transistor follower, the capacitor configured to store a voltage representative of a peak signal level at an output of the transistor follower.

11. The power detector as claimed in claim 6, wherein the instantaneous power processing device further comprises:

a comparator configured to receive the detector output signal and the reference signal and to generate an error signal based on a subtraction between the detector output signal and the reference signal; and

wherein the transistor follower is configured to receive the error signal and to provide the instantaneous power output signal.

12. A power detector comprising:

an input configured to receive an input signal;

a variable gain detection subsystem including only one squaring detector coupled to the input and which detects the input signal and provides a detector output signal;

an integrator coupled to the variable gain detection subsystem and configured to receive the detector output signal and a reference signal and to provide an integrator output signal which is representative of an average power level of the input signal; and

an instantaneous power processing device coupled to the variable gain detection subsystem and configured to receive the detector output signal and to provide at an output of the power detector an instantaneous power output signal which is representative of the instantaneous power level of the input signal normalized to the average power level of the input signal;

wherein the variable gain detection subsystem further includes a bias control circuit coupled between the integrator and the squaring detector, the bias control circuit being configured to receive the integrator output signal and to provide a detector gain control signal to the squaring detector; and

wherein the variable gain detection subsystem is further configured to control a scaling factor of the squaring detector based on the integrator output signal to adjust the detector output signal to a level approximately that of the reference signal.

13. A method of power detection comprising:

receiving an input signal at an input of a detector;

detecting with the detector a power level of the input signal to provide a detected signal;

subtracting from the detected signal a signal not related to the input signal to reduce effects of temperature and fabrication process variations at an output of the detector and to provide an output signal;

comparing the output signal with a reference signal to provide an error signal;

integrating the error signal to provide an integrated signal which is representative of an average power level of the input signal;

providing an instantaneous power output signal responsive to the output signal, the instantaneous power output signal being representative of the instantaneous power level of the input signal normalized to the average power level of the input signal; and

adjusting the output signal to a level approximately that of the reference signal.

14. The method as claimed in claim 13, wherein adjusting the output signal includes adjusting a scaling factor of the detector based on the integrated signal.

15. The method as claimed in claim 13, wherein providing the instantaneous power output signal includes buffering the output signal using a transistor follower to provide the instantaneous power output signal.

16. The method as claimed in claim 15, further comprising compensating for temperature variation of a base-emitter voltage of the transistor follower to provide a substantially temperature stable instantaneous power output signal.

17. The method as claimed in claim 13, wherein subtracting from the detected signal the signal not related to the input signal includes subtracting from the detected signal a signal generated by a reference detector which does not receive the input signal.