Method of forming a shallow trench isolation structure

• US 7,947,551 B1
• Filed: 09/28/2010
• Issued: 05/24/2011
• Est. Priority Date: 09/28/2010
• Status: Expired due to Fees

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Hsieh, Bor Chiuan, Syue, Sen-Hong, Wang, Shiang-Bau
• Primary Examiner(s): Stark; Jarrett J
• Assistant Examiner(s): Tobergte; Nicholas
• Application Number:
  US12/892,331
• Time in Patent Office: 238 Days
• Field of Search: 438/207, 438/196, 438/218, 257/374
• US Class Current: 438/218
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02282 liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/02356 treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
• CPC Class Codes: H01L 21/76224 using trench refilling with dielectric materials trench filling with polycristalline silicon H01L21/763; together with vertical isolation, e.g. trench refilling in a SOI substrate H01L21/76264

Abstract

An embodiment of the disclosure includes a method of forming a shallow trench isolation structure. A substrate is provided. The substrate includes a top surface. A trench is formed to extend from the top surface into the substrate. The trench has sidewalls and a bottom surface. A silicon liner layer is formed on the sidewalls and the bottom surface. A flowable dielectric material is filled in the trench. An anneal process is performed to densify the flowable dielectric material and convert the silicon liner layer into a silicon oxide layer simultaneously.

Claims

1. A method of forming a shallow trench isolation structure, comprising:

providing a substrate comprising a top surface;

forming a trench extending from the top surface into the substrate, wherein the trench has sidewalls and a bottom surface;

forming a silicon liner layer on the sidewalls and the bottom surface;

filling a flowable dielectric material in the trench;

curing the flowable dielectric material in a gaseous environment containing O₃; and

performing an anneal process to densify the flowable dielectric material and convert the silicon liner layer into a silicon oxide layer simultaneously.

2. The method of claim 1, wherein the silicon liner layer is an amorphous silicon layer.

3. The method of claim 1, wherein the trench has:

an aspect ratio in the range of about 5 to about 10; and

a width not more than 42 nm.

4. The method of claim 1, wherein the silicon layer has a thickness in the range of about 10 Å

to about 40 Å

.

5. The method of claim 1, wherein the silicon liner layer is formed in a gaseous environment containing Si₂H₆, Si₃H₈, SiH₄, SiCl₂H₂, or SiCl₃H.

6. The method of claim 1, wherein the silicon liner layer is formed in a temperature range of about 200°

C. to about 600°

C.

7. The method of claim 1, wherein the flowable dielectric material is formed in a gaseous environment containing Si₃H₉N and NH₃.

8. The method of claim 1, wherein curing the flowable dielectric material is carried out in an environment in a temperature range of about 10°

C. to 500°

C.

9. The method of claim 1, wherein the anneal process is performed in a temperature range of about 1000°

C. to 1200°

C.

10. A method of forming a shallow trench isolation structure, comprising:

providing a substrate comprising a top surface;

forming a trench extending from the top surface into the substrate, wherein the trench has sidewalls and a bottom surface;

forming an amorphous silicon liner layer on the sidewalls and the bottom surface;

filling a flowable oxide material in trench;

curing the flowable oxide material in a gaseous environment containing O₃; and

performing an anneal process to densify the flowable oxide material and convert the amorphous silicon liner layer into a silicon oxide layer simultaneously.

11. The method of claim 10, wherein the trench has:

an aspect ratio in the range of about 5 to about 10; and

a width not more than 42 nm.

12. The method of claim 10, wherein the amorphous silicon layer has a thickness in the range of about 10 Å

to about 40 Å

.

13. The method of claim 10, wherein the amorphous silicon liner layer is formed in a gaseous environment containing Si₂H₆, Si₃H₈, SiH₄, SiCl₂H₂, or SiCl₃H.

14. The method of claim 10, wherein the silicon liner layer is formed in a temperature range from about 200°

C. to about 600°

C.

15. The method of claim 10, wherein the flowable oxide material is formed in a gaseous environment containing Si₃H₉N and NH₃.

16. The method of claim 10, wherein the flowable oxide material is formed by a method comprising a spin on dielectric method or a low temperature deposition method.

17. The method of claim 16, wherein the low temperature deposition method is in a temperature less than about 100°

C.

18. The method of claim 10, wherein curing the flowable dielectric material is in a temperature range of about 10°

C. to 500°

C. before the anneal process.

19. The method of claim 10, wherein the anneal process is performed in a temperature range of about 1000°

C. to 1200°

C.

20. The method of claim 19, wherein the anneal process is carried out in an environment containing steam.