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Efficient rounding circuits and methods in configurable integrated circuit devices

  • US 7,948,267 B1
  • Filed: 02/09/2010
  • Issued: 05/24/2011
  • Est. Priority Date: 02/09/2010
  • Status: Active Grant
First Claim
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1. A specialized processing block for a configurable integrated circuit device, said specialized processing block comprising:

  • arithmetic circuitry that provides a result based on arithmetic functions of inputs;

    accumulator circuitry including an adder to which said result is applied as a first input; and

    rounding circuitry including said adder and a selector that selectably applies as a second input to said adder one of (a) output of said adder, whereby said adder functions as an accumulator, and (b) a rounding constant, whereby output of said adder, truncated to a selected bit position, is a rounded version of said result.

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