Architecture and instruction set for implementing advanced encryption standard (AES)
First Claim
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1. An apparatus comprising:
- an execution unit to perform a sequence of operations for an aes instruction, the sequence of operations to perform a programmable number of aes rounds, the operations to cause the execution unit to;
if the number of aes rounds is greater than 1;
load a key into a temporary key register; and
prior to performing each aes round, generate a round key for the aes round based on the key; and
for each aes round, perform a sequence of aes round operations on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or a result for the aes instruction; and
if the number of aes rounds is equal to 1, prior to performing the sequence of aes round operations, the execution unit to;
load a pre-computed round key for the aes round based on the key.
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Abstract
A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.
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Citations
18 Claims
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1. An apparatus comprising:
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an execution unit to perform a sequence of operations for an aes instruction, the sequence of operations to perform a programmable number of aes rounds, the operations to cause the execution unit to; if the number of aes rounds is greater than 1; load a key into a temporary key register; and prior to performing each aes round, generate a round key for the aes round based on the key; and for each aes round, perform a sequence of aes round operations on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or a result for the aes instruction; and if the number of aes rounds is equal to 1, prior to performing the sequence of aes round operations, the execution unit to; load a pre-computed round key for the aes round based on the key. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method comprising:
- if a number of programmable aes rounds for an aes instruction is greater than 1, loading a key into a temporary key register and prior to performing each aes round, generating a round key for the aes round based on the key; and
for each aes round, performing a sequence of aes round operations on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or a result for the aes instruction; and
if a number of aes rounds is equal to 1, prior to performing the sequence of aes round operations, loading a pre-computed round key for the aes round based on the key. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
- if a number of programmable aes rounds for an aes instruction is greater than 1, loading a key into a temporary key register and prior to performing each aes round, generating a round key for the aes round based on the key; and
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17. An article including a machine-accessible a machine accessible non-transitory storage medium having associated information,
wherein the information, when accessed, results in a machine performing: -
if the number of programmable aes rounds for an aes instruction is greater than 1, loading a key into a temporary key register and prior to performing each aes round, generating a round key for the aes round based on the key; and for each aes round, performing a sequence of aes round operations on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or a result for the aes instruction; and if the number of aes rounds is equal to 1, prior to performing the sequence of aes round operations, loading a pre-computed round key for the aes round based on the key.
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18. A system comprising:
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a dynamic random access memory to store data and instructions; and a processor coupled to said memory to execute the instructions, the processor comprising; an execution unit to perform a sequence of operations for an aes instruction, the sequence of operations to perform a programmable number of aes rounds, the operations to cause the execution unit to; if the number of aes rounds is greater than 1; load a key into a temporary key register; and prior to performing each aes round, generate a round key for the aes round based on the key; and for each aes round, perform a sequence of aes round operations on an input to the aes round and the round key for the aes round to provide a next input to a next aes round or a result for the aes instruction; and if the number of aes rounds is equal to 1, prior to performing the sequence of aes round operations, the execution unit to; load a pre-computed round key for the aes round based on the key.
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Specification