×

Layout circuit having a combined tie cell

  • US 7,949,988 B2
  • Filed: 04/01/2008
  • Issued: 05/24/2011
  • Est. Priority Date: 04/01/2008
  • Status: Active Grant
First Claim
Patent Images

1. A circuit layout method, comprising:

  • placing and routing standard cells on a layout area;

    adding a spare cell on the layout area, wherein the spare cell is provided for replacing one of the standard cells while adding or changing function; and

    adding a combined tie cell on the layout area for tying a voltage provided to the replaced standard cell, wherein the combined tie cell is independent of the standard cells.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×