Semiconductor device having variable parameter selection based on temperature and test method

• US 7,953,573 B2
• Filed: 04/02/2010
• Issued: 05/31/2011
• Est. Priority Date: 04/19/2006
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Agersonn RALL Group LLC (Intellectual Ventures LLC)
• Inventors: Walker, Darryl G.
• Primary Examiner(s): Le; John H
• Application Number:
  US12/753,411
• Publication Number:
  US 20110044119A1
• Time in Patent Office: 424 Days
• Field of Search: 702/42, 702/107, 702/130, 702/132, 702/136, 365/189.09, 365/211, 365/212, 365/222, 324/207.12, 327/512, 374/176, 374/185
• US Class Current: 702/130
• CPC Class Codes: G01R 31/2874 related to temperature

Abstract

A semiconductor device that may include temperature sensing circuits is disclosed. The temperature sensing circuits may be used to control various parameters, such as internal regulated supply voltages, internal refresh frequency, or a word line low voltage. In this way, operating specifications of a semiconductor device at worst case temperatures may be met without compromising performance at normal operating temperatures. Each temperature sensing circuit may include a selectable temperature threshold value as well as a selectable temperature hysteresis value. In this way, temperature performance characteristics may be finely tuned. Furthermore, a method of testing the temperature sensing circuits is disclosed in which a current value may be monitored and temperature threshold values and temperature hysteresis values may be thereby determined.

Claims

1. A method of testing a dynamic random-access memory (DRAM) device, the method comprising:

measuring an output of a temperature-sensing circuit of the DRAM device, wherein the temperature-sensing circuit is configured to provide a first temperature indication, and wherein the temperature-sensing circuit includes a temperature threshold value and a hysteresis temperature value;

incrementally changing a temperature of the DRAM device until the output of the temperature-sensing circuit changes from a first state to a second state at a first temperature;

associating the temperature threshold value with the first temperature;

incrementally changing the temperature of the DRAM device until the output of the temperature-sensing circuit changes from the second state to a third state at a second temperature; and

associating the hysteresis temperature value with the second temperature.

2. The method of claim 1, wherein the second temperature is lower than the first temperature.

3. The method of claim 1, wherein said measuring an output of a temperature-sensing circuit comprises measuring a current of the output of the temperature-sensing circuit.

4. The method of claim 3, wherein the current measurement is an average current measurement.

5. The method of claim 1, wherein the temperature-sensing circuit is configured to control a refresh timing of the DRAM device.

6. The method of claim 5, further comprising associating the first temperature with a first performance characteristic of the DRAM device.

7. The method of claim 6, further comprising associating the second temperature with a second performance characteristic of the DRAM device.

8. The method of claim 5, further comprising measuring a current draw of the DRAM device.

9. The method of claim 1, wherein the temperature threshold value is associated with a temperature threshold resistance.

10. The method of claim 1, wherein the hysteresis temperature value is associated with a hysteresis temperature resistance.

11. The method of claim 1, further comprising changing the temperature threshold value.

12. The method of claim 1, further comprising changing the hysteresis temperature value.

13. The method of claim 1, wherein the temperature-sensing circuit further comprises:

an amplifier including a positive input and a negative input;

a transistor electrically connected to the positive input, wherein the transistor is configured to be controlled by a temperature signal; and

a temperature threshold resistance and a hysteresis resistance electrically connected in series to the positive input, wherein the hysteresis resistance is configured to be controlled, at least in part, by an output of the amplifier.

14. The method of claim 13, wherein the threshold resistance comprises a variable resistance.

15. The method of claim 13, wherein the hysteresis resistance comprises a variable resistance.

16. The method of claim 13, wherein the threshold resistance and the hysteresis resistance are programmable.

17. A method of testing a dynamic random-access memory (DRAM) device, the method comprising:

placing the DRAM device in a mode of operation;

measuring a power consumption of the DRAM device, wherein the DRAM device includes a temperature-sensing circuit configured to provide a first temperature indication, and wherein the temperature-sensing circuit comprises a temperature threshold value and a hysteresis temperature value;

incrementally changing a temperature of the DRAM device until the power consumption of the DRAM device changes from a first state to a second state at a first temperature;

associating the temperature threshold value with the first temperature;

incrementally changing the temperature of the DRAM device until the power consumption of the DRAM device changes from the second state to a third state at a second temperature; and

associating the hysteresis temperature value with the second temperature.

18. The method of claim 17, wherein the second temperature is lower than the first temperature.

19. The method of claim 17, wherein said measuring a power consumption of the DRAM device comprises measuring a current of the DRAM device.

20. The method of claim 19, wherein the current measurement is an average current measurement.

21. The method of claim 17, wherein the temperature-sensing circuit is configured to control a refresh timing of the DRAM device.

22. The method of claim 17, further comprising associating the first temperature with a first performance characteristic of the DRAM device.

23. The method of claim 22, further comprising associating the second temperature with a second performance characteristic of the DRAM device.

24. The method of claim 17, wherein the temperature threshold value is associated with a temperature threshold resistance.

25. The method of claim 17, wherein the hysteresis temperature value is associated with a hysteresis temperature resistance.

26. The method of claim 17, further comprising changing the temperature threshold value.

27. The method of claim 17, further comprising changing the hysteresis temperature value.

28. The method of claim 17, wherein the temperature-sensing circuit further comprises:

an amplifier including a positive input and a negative input;

a transistor electrically connected to the positive input, wherein the transistor is configured to be controlled by a temperature signal; and

a temperature threshold resistance and a hysteresis resistance electrically connected in series to the positive input, wherein the hysteresis resistance is configured to be controlled, at least in part, by an output of the amplifier.

29. The method of claim 28, wherein the threshold resistance comprises a variable resistance.

30. The method of claim 28, wherein the hysteresis resistance comprises a variable resistance.

31. The method of claim 28, wherein the threshold resistance and the hysteresis resistance are programmable.