Systems and methods for retrieving data

• US 7,954,004 B2
• Filed: 07/19/2010
• Issued: 05/31/2011
• Est. Priority Date: 06/07/2007
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Li, Tieniu
• Primary Examiner(s): Iqbal; Nadeem
• Application Number:
  US12/839,048
• Publication Number:
  US 20100287410A1
• Time in Patent Office: 316 Days
• Field of Search: 714 5- 8, 714 15- 21, 714 26- 28, 714 37- 42, 714 52- 54
• US Class Current: 714/6.13
• CPC Class Codes: G06F 11/073 in a memory management context, e.g. virtual memory or cache management memory management G06F12/00; testing of static memory units G11C29/00
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: G06F 11/1068 in sector programmable memories, e.g. flash disk G06F11/1072 takes precedence
• CPC Class Codes: G06F 11/2017 where memory access, memory control or I/O control functionality is redundant redundant communication control functionality G06F11/2005; redundant storage control functionality G06F11/2089
• CPC Class Codes: G06F 2201/85 Active fault masking without idle spares active fault masking without idle spare hardware where processing functionality is redundant G06F11/2035
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Abstract

Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques can be embodied in a device driver of an operating system. Errors are tracked during read operations. If sufficient errors are observed during read operations, the block is then retired when it is requested to be erased or a page of the block is to be written. One embodiment is a technique to recover data from uncorrectable errors. For example, a read mode can be changed to a more reliable read mode to attempt to recover data. One embodiment further returns data from the memory device regardless of whether the data was correctable by decoding of error correction code data or not.

Claims

1. A method of accessing a page of data from a non-volatile integrated circuit memory device, the method comprising:

requesting a read of the page of data from the memory device;

inspecting error correction codes (ECC) associated with the page;

determining that a decoding of an initial read has resulted in an uncorrectable error, wherein the initial read was performed using a first read mode of operation;

changing from the first read mode of operation to a second read mode of operation;

requesting another read of the page using the second read mode of operation;

providing a status to an operating system that indicates that the page of data was read correctly regardless of whether or not the page of data included any uncorrectable errors.

2. The method of claim 1, wherein the second read mode of operation is slower than the first read mode of operation.

3. The method of claim 2, wherein the first read mode of operation comprises direct memory access (DMA), and wherein the second read mode of operation comprises using a microprocessor to control access.

4. A method of accessing a page of data from a non-volatile integrated circuit memory device, the method comprising:

requesting a read of the page of data from the memory device;

inspecting error correction codes (ECC) associated with the page; and

providing a status to an operating system that indicates that the page of data was read correctly regardless of whether or not the page of data included any uncorrectable errors.

5. The method of claim 4, wherein at least a first read mode of operation and a second read mode of operation slower than the first read mode of operation are selectable for reading data from the device, wherein requesting a read of the page further comprises:

determining that a decoding of an initial read has resulted in an uncorrectable error, wherein the initial read was performed using the first read mode of operation;

changing from the first read mode of operation to the second read mode of operation; and

requesting another read of the page.

6. The method of claim 5, wherein the first read mode of operation comprises direct memory access (DMA), and wherein the second read mode of operation comprises using a microprocessor to control access.

7. The method of claim 5, further comprising determining whether to request another read of the page based at least partly on a loop counter.

8. The method of claim 5, further comprising determining whether to request another read of the page based at least partly on a timer.

9. The method of claim 4, wherein the non-volatile integrated circuit memory comprises NAND flash.

10. The method of claim 4, wherein the method is performed by a driver of an operating system, wherein the operating system comprises software instructions executed by a computer.

11. A method of accessing a page of data from a non-volatile integrated circuit memory device, the method comprising:

changing a mode of a read of a page of data from a memory device;

requesting a read of the page of data from the memory device;

correcting correctable errors in the page of data read; and

providing the read page of data regardless of whether the read page of data included any uncorrectable errors.

12. The method of claim 11, further comprising:

determining that a decoding of an earlier read has resulted in an uncorrectable error, wherein the earlier read was performed using the first read mode;

wherein changing a mode of a read of a page further comprises changing from a first read mode to a second read mode, wherein the second read mode is slower than the first read mode.

13. The method of claim 12, wherein the first read mode comprises direct memory access (DMA), and wherein the second read mode of operation comprises processor input/output (PIO).

14. The method of claim 12, further comprising determining whether to request an additional read of the page based at least partly on a loop counter.

15. The method of claim 12, further comprising determining whether to request an additional read of the page based at least partly on a timer.

16. The method of claim 11, wherein the non-volatile integrated circuit memory comprises NAND flash.

17. The method of claim 11, wherein the method is performed by a driver of an operating system, wherein the operating system comprises software instructions executed by a computer.

18. An apparatus for accessing a page of data from a non-volatile integrated circuit memory device, the apparatus comprising:

a module configured to request a read of the page of data from the memory device;

a module configured to inspect error correction codes (ECC) associated with the page; and

a module configured to provide a status to an operating system that indicates that the page of data was read correctly regardless of whether or not the page of data included any uncorrectable errors.

19. The apparatus of claim 18, wherein at least a first read mode of operation and a second read mode of operation slower than the first read mode of operation are selectable for reading data from the device, wherein the module configured to request a read of the page is further configured to:

determine that a decoding of an initial read has resulted in an uncorrectable error, wherein the initial read was performed using the first read mode of operation;

change from the first read mode of operation to the second read mode of operation; and

request another read of the page.

20. The apparatus of claim 19, wherein the first read mode of operation comprises direct memory access (DMA), and wherein the second read mode of operation comprises processor input/output (PIO).