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Apparatus and method for reducing interference

  • US 7,955,886 B2
  • Filed: 03/30/2005
  • Issued: 06/07/2011
  • Est. Priority Date: 03/30/2005
  • Status: Active Grant
First Claim
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1. A method of minimizing interference between RF circuitry and digital circuitry on an integrated circuit comprising:

  • forming an inductance on the integrated circuit using first and second conductive loops coupled together, the first and second conductive loops defining a first axis extending through the first and second conductive loops and defining a second axis perpendicular to the first axis;

    configuring the first and second conductive loops such that current flows in opposite directions in the first and second loops to at least partially cancel magnetic fields generated from the loops, and such that magnetic cancellation is maximized at locations along the second axis; and

    configuring relative positions of the inductance and circuitry on the integrated circuit to achieve a desired amount of magnetic cancellation.

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