Semiconductor light-emitting device with high light-extraction efficiency

• US 7,956,373 B2
• Filed: 04/17/2008
• Issued: 06/07/2011
• Est. Priority Date: 04/20/2007
• Status: Active Grant

• Current Assignee: Epistar Corporation (Ennostar, Inc.)
• Original Assignee: Huga Optotech Incorporated (Ennostar, Inc.)
• Inventors: Shih, Wen-Chung, Wang, Wei-Kai, Lin, Su-Hui
• Primary Examiner(s): Roman; Angel
• Application Number:
  US12/081,595
• Publication Number:
  US 20080258163A1
• Time in Patent Office: 1,146 Days
• Field of Search: 257/98, 257/E33.067, 257/E33.074
• US Class Current: 257/98
• CPC Class Codes: H01L 33/20 with a particular shape, e.g. curved or truncated substrate
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

The invention discloses a semiconductor light-emitting device and a fabricating method thereof. The semiconductor light-emitting device according to the invention includes a substrate, a multi-layer structure, a top-most layer, and at least one electrode. The multi-layer structure is formed on the substrate and includes a light-emitting region. The top-most layer is formed on the multi-layer structure, and the lower part of the sidewall of the top-most layer exhibits a first surface morphology relative to a first pattern. In addition, the upper part of the sidewall of the top-most layer exhibits a second surface morphology relative to a second pattern. The first pattern is different from the second pattern. The at least one electrode is formed on the top-most layer. Therefore, the sidewall of the semiconductor light-emitting device according to the invention exhibits a surface morphology, which increases the light extraction area of the sidewall, and consequently enhances the light extraction efficiency of the semiconductor light-emitting device.

Claims

1. A semiconductor light-emitting device, comprising:

a substrate;

a multi-layer structure, formed on the substrate, comprising a light-emitting region;

a top-most layer, formed on the multi-layer structure, the lower part of the sidewall of the top-most layer exhibiting a first surface morphology relative to a first pattern, the upper part of the sidewall of the top-most layer exhibiting a second surface morphology relative to a second pattern, the first pattern being different from the second pattern; and

at least one electrode, formed on the top-most layer and on the multi-layer structure.

2. The semiconductor light-emitting device of claim 1, wherein the top-most layer is formed of Indium-Tin oxide (ITO) or Zinc oxide.

3. The semiconductor light-emitting device of claim 1, wherein the light-emitting region comprises one selected from the group consisting of a PN-junction, a double hetero junction and a multiple quantum well.

4. The semiconductor light-emitting device of claim 1, wherein the substrate is formed of a material selected from the group consisting of Si, GaN, AIN, sapphire, spinnel, SiC, GaAs, Al.sub.2O.sub.3, LiGaO.sub.2, LiAlO.sub.2, and MgAl.sub.2O.sub.4.

5. The semiconductor light-emitting device of claim 1, wherein the first surface morphology of the sidewall of the top-most layer is formed by use of an etching-resistant layer whose boundary exhibits the first pattern.

6. The semiconductor light-emitting device of claim 5, wherein the etching-resistant layer is formed of silicon oxide or a photo-resist material.

7. The semiconductor light-emitting device of claim 5, wherein the etching-resistant layer is formed of nickel or aluminum.

8. The semiconductor light-emitting device of claim 7, wherein the boundary of the etching-resistant layer with the first pattern is formed by an annealing process.

9. The semiconductor light-emitting device of claim 1, wherein the sidewall of the substrate exhibits a surface morphology relative to a third pattern.

10. The semiconductor light-emitting device of claim 1, wherein the sidewall of the multi-layer structure exhibits a surface morphology relative to a fourth pattern.