Read-out circuit of image sensor
First Claim
1. An image sensing device comprising:
- a pixel sensor;
a first charge storage element configured to store a reset charge received from the pixel sensor;
a second charge storage element configured to store a pixel charge received from the pixel sensor;
an analog bus including a reset line and a pixel line;
a correlated double sampling device (CDS) comprising;
a first driver configured to receive the reset charge from the first charge storage element and to provide a reset signal on the reset line;
a second driver configured to receive the pixel charge from second charge storage element and to provide a pixel signal on the pixel line; and
a CDS equalization device configured to equalize the reset charge stored on the first charge storage element with the pixel charge stored on the second charge storage element;
a line equalization device configured to equalize electric potential levels between the reset line and the pixel line; and
a differential amplification unit including inputs configured to receive the reset line and the pixel line, respectively, and wherein the differential amplification unit is further configured to provide first and second differential analog output signals corresponding to differentiated values of the reset signal and the pixel signal upon concurrent activation of the CDS equalization device and the line equalization device.
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Accused Products
Abstract
A read-out circuit of an image sensor is provided. The read-out circuit includes: a CDS block, including: a plurality of reset capacitors storing inputted reset values of pixels; a plurality of signal capacitors storing inputted signal values of the pixels; a plurality of reset driving devices outputting the reset values stored into the reset capacitors; a plurality of signal driving devices outputting the signal values stored into the signal capacitors; and a plurality of capacitor equalization devices equalizing electric potential levels of the reset capacitors and the signal capacitors; a reset line transferring reset value output signals of the CDS block; a signal line transferring signal value output signals of the CDS block; a differential amplification unit amplifying a difference between the individual reset value output signal and the individual signal value output signal; and a line equalization device equalizing electric potential levels of the reset line and signal line.
21 Citations
24 Claims
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1. An image sensing device comprising:
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a pixel sensor; a first charge storage element configured to store a reset charge received from the pixel sensor; a second charge storage element configured to store a pixel charge received from the pixel sensor; an analog bus including a reset line and a pixel line; a correlated double sampling device (CDS) comprising; a first driver configured to receive the reset charge from the first charge storage element and to provide a reset signal on the reset line; a second driver configured to receive the pixel charge from second charge storage element and to provide a pixel signal on the pixel line; and a CDS equalization device configured to equalize the reset charge stored on the first charge storage element with the pixel charge stored on the second charge storage element; a line equalization device configured to equalize electric potential levels between the reset line and the pixel line; and a differential amplification unit including inputs configured to receive the reset line and the pixel line, respectively, and wherein the differential amplification unit is further configured to provide first and second differential analog output signals corresponding to differentiated values of the reset signal and the pixel signal upon concurrent activation of the CDS equalization device and the line equalization device. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. An image sensing device, comprising:
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a plurality of pixel sensors; an analog bus comprising an analog reset line and an analog pixel line; a correlated double sampling (CDS) block, comprising; a plurality of reset capacitors configured to store reset signals provided from the plurality of pixel sensors; a plurality of pixel capacitors configured to store pixel signals provided from the plurality of pixel sensors; a plurality of reset driving devices configured to provide the reset signals from the plurality of reset capacitors to the analog reset line of the analog bus; a plurality of pixel signal driving devices configured to provide the pixel signals from the plurality of pixel capacitors to the analog pixel line of the analog bus; and a plurality of capacitor equalization devices configured to equalize electric potential levels between the reset signal stored on each reset capacitor of the plurality of reset capacitors with the pixel signal stored on each respective pixel capacitor of the plurality of pixel capacitors; a line equalization device configured to equalize electric potential levels between the analog reset line and the analog pixel line; and a differential amplification unit including inputs configured to receive the reset signals from the analog reset line and to receive the pixel signals from the analog pixel line, wherein the differential amplification unit is further configured to provide first and second differential analog output signals corresponding to differentiated values of the reset signal and the pixel signal of a given pixel upon concurrent activation of a corresponding capacitor equalization device and the line equalization device. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. An image sensing device comprising:
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a pixel sensor; an analog bus including a reset line and a pixel line; a correlated double sampling (CDS) circuit having a first input configured to receive a pixel signal from the pixel sensor, a first output configured to provide the pixel signal to the pixel line of the analog bus, a second input configured to receive a reset signal from the pixel sensor, and a second output configured to provide a reset signal to the reset line of the analog bus; a CDS equalization device configured to equalize electric potential levels between the pixel signal and the reset signal at the first input and the second input of the CDS circuit; a line equalization device configured to equalize electric potential levels between the reset line and the pixel line of the analog bus; and a differential amplification unit having a first input receiving the reset signal from the reset line and a second input receiving the pixel signal from the pixel line, wherein the differential amplification unit is configured to provide first and second differential analog output signals corresponding to differentiated values of the reset signal and the pixel signal upon concurrent activation of the CDS equalization device and the line equalization device. - View Dependent Claims (19, 20, 21, 22, 23, 24)
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Specification