Full-bridge and half-bridge compatible driver timing schedule for direct drive backlight system
First Claim
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1. A method to flexibly control a half-bridge or a full-bridge switching network in a backlight inverter, the method comprising generating at least four driving signals with alternating states to control the switching network, wherein the first and the second driving signals are substantially identical with an 180°
- phase shift, the third and the fourth driving signals have rising edges that precede respective rising edges of the first and the second driving signals by a first duration, and the third and the fourth driving signals have falling edges that trail respective falling edges of the first and the second driving signals by a second duration.
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Abstract
A driver circuit or controller flexibly drives either a half-bridge or a full-bridge switching network in a backlight inverter without modification, redundant circuitry or additional components. The driver circuit includes four outputs to provide four respective driving signals that establish a periodic timing sequence using a zero-voltage switching technique for semiconductor switches in the switching network.
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Citations
20 Claims
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1. A method to flexibly control a half-bridge or a full-bridge switching network in a backlight inverter, the method comprising generating at least four driving signals with alternating states to control the switching network, wherein the first and the second driving signals are substantially identical with an 180°
- phase shift, the third and the fourth driving signals have rising edges that precede respective rising edges of the first and the second driving signals by a first duration, and the third and the fourth driving signals have falling edges that trail respective falling edges of the first and the second driving signals by a second duration.
- View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 19, 20)
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11. A method to flexibly control a half-bridge or a full-bridge switching network in a backlight inverter, the method comprising:
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generating first and the second driving signals are substantially identical with a 180°
phase shift;generating third and the fourth driving signals have rising edges that precede respective rising edges of the first and the second driving signals by a first duration, and wherein the third and the fourth driving signals have falling edges that trail respective falling edges of the first and the second driving signals by a second duration; and driving a switching network comprising a plurality of semiconductor switches with the first, second, third and fourth driving signals to convert a direct current source into an alternating current source to power a load. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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Specification