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Synchronous page-mode phase-change memory with ECC and RAM cache

  • US 7,965,546 B2
  • Filed: 10/15/2009
  • Issued: 06/21/2011
  • Est. Priority Date: 04/26/2007
  • Status: Expired due to Fees
First Claim
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1. A method for writing to a phase-change memory comprising:

  • receiving from a host a burst write command including a host address and host data in a command buffer;

    comparing a portion of the host address to a plurality of tags in a lookup table and for storing the host data in the lookup table when a tag in the plurality of tags matches the portion of the host address;

    when the portion of the host address does not match any valid tag in the plurality of tags, allocating a new entry in the lookup table for the host address and storing the host data in the new entry;

    copying the host data from the lookup table to the phase-change memory by storing a data word data as binary bits each represented by a chalcogenide glass layer having a melting point that is higher than a crystallization point, the chalcogenide glass layer forming a variable resistor that alters a sensing current when a binary bit is read; and

    representing a first binary logic state using a crystalline state of the variable resistor and representing a second binary logic state using an amorphous state of the variable resistor for binary bits stored in the phase-change memory.

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