Computer system and method for executing port communications without interrupting the receiving computer
First Claim
Patent Images
1. A method for communicating between a plurality of computers, said method comprising:
- providing a first computer having a processor, a memory, and at least one communication port;
providing a second computer having a processor, a memory, and at least one communication port, said memory of said second computer including a first program of instructions;
executing said first program with said second computer;
receiving an indication of a second program of instructions at said communication port of said second computer by checking the value of at least one bit at least partially controlled by said first computer against a predetermined value, said second program output from said communication port of said first computer;
continuing said executing of said first program with said second computer following said receiving said indication of said second program;
pausing said executing of said first program if the value of said at least one bit matches said predetermined value, said pausing responsive to at least one of said instructions of said first program;
executing said second program with said second computer;
pausing said executing of said second program responsive to one of said instructions of said second program; and
resuming execution of said first program with said second computer; and
whereinsaid receiving said indication of said second program does not cause an interrupt in processing functions of said second computer.
5 Assignments
0 Petitions
Accused Products
Abstract
A microprocessor system in which an array of processors communicates more efficiently through the use of a worker mode function. Processors that are not currently executing code remain in an inactive but alert state until a task is sent to them by an adjacent processor. Processors can also be programmed to temporarily suspend a task to check for incoming tasks or messages.
206 Citations
35 Claims
-
1. A method for communicating between a plurality of computers, said method comprising:
-
providing a first computer having a processor, a memory, and at least one communication port; providing a second computer having a processor, a memory, and at least one communication port, said memory of said second computer including a first program of instructions; executing said first program with said second computer; receiving an indication of a second program of instructions at said communication port of said second computer by checking the value of at least one bit at least partially controlled by said first computer against a predetermined value, said second program output from said communication port of said first computer; continuing said executing of said first program with said second computer following said receiving said indication of said second program; pausing said executing of said first program if the value of said at least one bit matches said predetermined value, said pausing responsive to at least one of said instructions of said first program; executing said second program with said second computer; pausing said executing of said second program responsive to one of said instructions of said second program; and resuming execution of said first program with said second computer; and
whereinsaid receiving said indication of said second program does not cause an interrupt in processing functions of said second computer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 21, 22, 23, 24, 25, 34)
-
-
11. A method of sharing processing tasks between a plurality of computers, said method comprising:
-
providing a first computer having a processor, a memory, and at least one communication port; providing a second computer having a processor, a memory, and at least one communication port, said memory including a first program of instructions; providing a data bus between said communication port of said first computer and said communication port of said second computer; executing said first program with said second computer; receiving an indication of a second program of instructions at said communication port of said second computer by checking the value of at least one bit at least partially controlled by said first computer against a predetermined value; continuing said executing of said first program with said second computer following said receiving said indication of said second program; pausing said executing of said first program if the value of said at least one bit matches said predetermined value, said pausing responsive to at least one of said instructions of said first program; receiving said second program on said data bus with said second computer, said second program received from said first computer; and executing said second program with said second computer; and
whereinsaid receiving said indication of said second program does not interrupt the processing functions of said second computer. - View Dependent Claims (12, 13, 14, 15, 26, 27, 28, 29, 30, 35)
-
-
16. A processing system, comprising:
-
an array of interconnected computers, wherein each computer further comprises; a processing unit; a memory for storing a program of instructions; an I/O register; a plurality of communication ports; a sending mechanism for sending an output to at least one receiving computer; a receiving mechanism for receiving an input from at least one sending computer; a monitoring mechanism in which said computer can determine the source of said input; and an executing mechanism in which said computer can execute said program in said memory and respond to said input; and
whereinsaid monitoring mechanism is operative to indicate that said at least one sending computer is ready to send said input based on the value of at least one bit at least partially controlled by said sending computer; said executing mechanism, responsive to at least one instruction in said program, is operative to suspend execution of said program if said at least one bit at least partially controlled by said sending computer matches a predetermined value; and said executing mechanism, responsive to said receiving mechanism receiving said input and a second program in said input, is operative to execute said second program after execution of said program is suspended. - View Dependent Claims (17, 18, 19, 20, 31, 32, 33)
-
Specification